Jiří Kadlec
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Coleman J. N., Softley C. I., Kadlec Jiří, Matoušek R., Tichý Milan, Pohl Zdeněk, Heřmánek Antonín, Benschop N. F.:
The European Logarithmic Microprocessor
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IEEE Transactions on Computers vol.57, 4 (2008), p. 532-546
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Kadlec Jiří:
Design Flow for Reconfigurable MicroBlaze Accelerators
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4th International Workshop on Reconfigurable Communication Centric System-on-Chips Workshop Proceedings
, Eds: Moreno Manuel J., Madrenas Jordi, Sassatelli Gilles, Hübner Michael, Zipf Peter,
ReCoSoC 2008 4th Reconfigurable Communication-centric Systems-on-Chip workshop,
(Barcelona, ES, 09.07.2008-11.07.2008)
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Daněk Martin, Kadlec Jiří, Bartosinski Roman, Kohout Lukáš:
Increasing the Level of Abstraction in FPGA-based Designes
,
International Conference on Field Programmable Logic and Applications
, Eds: Kebschull Udo,
International Conference on Field Programmable Logic and Applications,
(Heidelberg, DE, 08.09.2008-10.09.2008)
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Kadlec Jiří, Daněk Martin, Kohout Lukáš:
Proposed architecture of configurable, adaptable SoC
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The IET Irish Signals and Systems Conference ISSC 2008
, Eds: Morgan Fearghal, Glavin Martin, Jones Edward,
The Institution of Engineering and Technology Irish Signals and Systems Conference, ISSC 2008,
(Galway, IE, 18.06.2008-19.06.2008)
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Kadlec Jiří, Bartosinski Roman, Daněk Martin:
Accelerating MicroBlaze Floating Point Operations
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Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL)
, Eds: Bertels Koen, Najjar Walid, Genderen Arjan, Vassiliadis Stamatis,
International Conference on Field Programmable Logic and Applications. FPL 2007,
(Amsterdam, NL, 27.08.2007-29.08.2007)
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Kadlec Jiří:
Embedded Development Environment for a Family of Xilinx FPGA
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Regional Conference on Embedded and Ambient Systems Book of Abstracts
, Eds: Varga Antila K., Kiss Ákos, Marsiske Stefan, Vásárhelyi József,
RCEAS 2007 First Regional Conference on Embedded and Ambient Systems,
(Budapešť, HU, 22.11.2007-24.11.2007)
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Kadlec Jiří, Daněk Martin:
Design and verification methodology for reconfigurable designs in Atmel FPSLIC
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Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 79-80
, Eds: Reorda M. S., Novák O., Straube B.,
DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems,
(Prague, CZ, 18.04.2006-21.04.2006)
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Daněk Martin, Heřmánek Antonín, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk:
GIN - notetaker for blind people: An example of using dynamic reconfiguration of FPGAs
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ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 15-18
, Eds: Bosschere K.,
HiPEAC Network of Excellence,
(Ghent 2005)
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ACACES 2005.,
(L'Aquila, IT, 26.07.2005)
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Pohl Zdeněk, Kadlec Jiří, Šůcha P., Hanzálek Z.:
Performance tuning of interative algorithms in signal processing
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Proseedings of the 2005 International Conference on Field Programmable Logic and Applications. FPL 2005, p. 699-702
, Eds: Rissa T., Wilton S., Leong P.,
FPL 2005. International Conference on Field Programmable Logic and Applications,
(Tampere, FI, 24.08.2005-26.08.2005)
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Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk:
Reconfigurable system-on-a-programmable-chip platform
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Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, p. 21-28,
IEEE Workshop on DDECS 2004 /7./,
(Stará Lesná, SK, 18.04.2004-21.04.2004)
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Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří:
Dynamic reconfiguration of Atmel FPGAs
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UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-4
, Eds: Hettiaratchi S.,
University of Southampton,
(Southampton 2003)
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UK ACM SIGDA Workshop on Electronic Design Automation /3./,
(Southampton, GB, 11.09.2003-12.09.2003)
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Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří:
Dynamic reconfiguration of FPGAs
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Recent Trends in Multimedia Information Processing. Proceedings, p. 288-291
, Eds: Šimák B., Zahradník P.,
Czech Technical University,
(Prague 2003)
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International Workshop on Systems, Signals and Image Processing /10./,
(Praha, CZ, 10.09.2003-11.09.2003)
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Matoušek Rudolf, Daněk Martin, Pohl Zdeněk, Kadlec Jiří:
Dynamic runtime partial reconfiguration in FPGA
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ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, p. 294-298
, Eds: Nouza J., Drábková J.,
Technical University,
(Liberec 2003)
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ECMS 2003 /6./,
(Liberec, CZ, 02.06.2003-04.06.2003)
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Heřmánek Antonín, Pohl Zdeněk, Kadlec Jiří:
FPGA implementation of the adaptive lattice filter
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Field-Programmable Logic and Applications. Proceedings of the 13th International Conference, p. 1095-1098
, Eds: Cheung P. Y. K., Constantinides G. A., de Sousa J. D.,
Springer,
(Berlin 2003)
Lecture Notes in Computer Science.
vol.2778
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Field Programmable Logic and Applications /13./,
(Lisabon, PT, 01.09.2003-03.09.2003)
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Pohl Zdeněk, Matoušek Rudolf, Kadlec Jiří, Tichý Milan, Líčko M.:
Lattice adaptive filter implementation for FPGA
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FPGA 2003 ACM/SIGDA Eleventh ACM International Symposium on Field-Programmable Gate Arrays, p. 246,
ACM,
(Monterey 2003)
,
FPGA 2003,
(Monterey, US, 23.02.2003-25.02.2003)
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Schier Jan, Kadlec Jiří:
Using logarithmic arithmetic for FPGA implementation of the Givens rotations
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Proceedings of the Sixth Baiona Workshop on Signal Processing in Communications, p. 199-204
, Eds: Mosquera C., Perez-Gonzales F.,
Universidade de Vigo,
(Vigo 2003)
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Baiona Workshop on Signal Processing Communications /6./,
(Baiona, ES, 08.09.2003-10.09.2003)
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Albu F., Kadlec Jiří, Heřmánek Antonín, Fagan A., Coleman N.:
Analysis of the LNS implementation of the fast affline projection algorithms
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Proceedings of the Irish Signals and Systems Conference 2002. ISSC 2002, p. 251-255
, Eds: Marnane W., Lightbody G., Pesch D.,
Institute of Technology,
(Cork 2002)
,
Irish Signals and Systems Conference 2002,
(Cork, IE, 25.06.2002-26.06.2002)
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Matoušek R., Pohl Z., Kadlec Jiří, Tichý Milan, Heřmánek Antonín:
Logarithmic arithmetic core based RLS LATTICE implementation
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Design, Automation and Test in Europe DATE 02, p. 271
, Eds: Sciuto D., Kloos C. D.,
IEEE,
(Los Alamitos 2002)
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Design, Automation and Test in Europe DATE 02,
(Paris, FR, 04.03.2002-08.03.2002)
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Matoušek Rudolf, Tichý Milan, Pohl Zdeněk, Kadlec Jiří, Softley C.:
Logarithmic number system and floating-point arithmetics on FPGA
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Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream, p. 627-636
, Eds: Glesner M., Zipf P., Renovell M.,
Springer,
(Berlin 2002)
Lecture Notes in Computer Science.
vol.2438
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International Conference FPL 2002 /12./,
(Montpellier, FR, 02.09.2002-04.09.2002)
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Kadlec Jiří, Tichý Milan, Heřmánek Antonín, Pohl Z., Líčko M.:
Matlab Toolbox for high-level bit-exact emulation of HandelC VHDL FPGA designs
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Design, Automation and Test in Europe DATE˙02, p. 264
, Eds: Sciuto D., Kloos C. D.,
IEEE,
(Los Alamitos 2002)
,
Design, Automation and Test in Europe DATE˙02,
(Paris, FR, 04.03.2002-08.03.2002)
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Albu F., Kadlec Jiří, Coleman N., Fagan A.:
Pipelined implementations of the A Priory Error-Feedback LSL algorithm using logarithmic arithmetic
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Proceedings of the IEEE International Conference on Acoustics, Speech and Signal Processing, p. 2681-2684,
IEEE,
(Orlando 2002)
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ICASSP 2002,
(Orlando, US, 13.05.2002-17.05.2002)
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Albu F., Kadlec Jiří, Coleman N., Fagan A.:
The Gauss-Seidel Fast Affine Projection algorithm
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IEEE Workshop on Signal Processing Systems. Proceedings, p. 109-114
, Eds: Parhi K., Shanbhag N.,
IEEE,
(San Diego 2002)
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SIPS 2002,
(San Diego, US, 16.10.2002-18.10.2002)
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Coleman J. N., Kadlec Jiří:
Extended Precision Logarithmic Arithmetic
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Signal Systems and Computers 2000, 34th Asilomar Conference on Signal Systems and Computers. Proceedings, p. 124-129,
IEEE Signal Processing Society,
(Monterey 2001)
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Asilomar conference on Signal Systems and Computers /34./,
(Monterey, US, 07.11.2000)
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Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav:
FPGA implementation of logarithmic unit core
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Embedded Intelligence 2001, p. 547-554,
Design & Elektronik,
(Nürnberg 2001)
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Embedded Intelligence 2001,
(Nürnberg, DE, 14.02.2001-16.02.2001)
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Albu F., Kadlec Jiří, Fagan A., Coleman J. N.:
Implementation of Error-Feedback RLS Lattice on Virtex using logarithmic arithmetic
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Advances in Systems Science: Measurement, Circuits and Control. Proceedings, p. 517-521
, Eds: Mastorakis N. E., Pecorelli-Peres L. A.,
WSES Press,
(Rethymno 2001)
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WSES Multiconference on Circuits, Systems, Communications & Computers. CSCC 2001 /5./,
(Kréta, GR, 08.07.2001-15.07.2001)
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Albu F., Kadlec Jiří, Softley Ch., Matoušek Rudolf, Heřmánek Antonín, Coleman J. N., Fagan A.:
Implementation of (Normalised) RLS Lattice on Virtex
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Field-Programmable Logic and Applications. Proceedings, p. 91-100
, Eds: Brebner G., Woods R.,
Springer,
(Berlin 2001)
Lecture Notes in Computer Science.
vol.2147
,
International Conference FPL 2001,
(Belfast, IE, 27.08.2001-29.08.2001)
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Kadlec Jiří, Matoušek Rudolf, Heřmánek Antonín, Líčko Miroslav, Softley Ch.:
Logarithmic ALU 32-bit for Handel C 2.1 and Celoxica DK1
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Celoxica User Conference. Proceedings,
Celoxica,
(Abington 2001)
,
Celoxica User Conference /1./,
(Stratford, GB, 02.04.2001-04.04.2001)
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Heřmánek Antonín, Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav, Pohl Zdeněk:
Pipelined logarithmic 32bit ALU for Celoxica DK1
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Sborník příspěvků 9.ročníku konference MATLAB 2001, p. 72-80
, Eds: Procházka A., Uhlíř J.,
VŠCHT,
(Praha 2001)
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MATLAB 2001 /9./,
(Praha, CZ, 11.10.2001)
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Heřmánek Antonín, Matoušek Rudolf, Líčko Miroslav, Kadlec Jiří:
FPGA implementation of logarithmic unit
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Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 84-90,
VŠCHT,
(Praha 2000)
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MATLAB 2000 /8./,
(Praha, CZ, 01.11.2000)
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Schier Jan, Kadlec Jiří, Moonen M.:
Implementing advanced equalization algorithms using Simulink with embedded Alpha AXP coprocessor
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Fifth IMA International Conference on Mathematics in Signal Processing, p. 11-14,
University of Warwick,
(Warwick 2000)
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Mathematics in Signal Processing /5./,
(Warwick, GB, 18.12.2000-20.12.2000)
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Ondračka J., Oravec R., Kadlec Jiří, Cocherová E.:
Simulation of RLS and LMS algorithms for adaptive noise cancellation in MATLAB
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Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 301-305,
VŠCHT,
(Praha 2000)
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MATLAB 2000 /8./,
(Praha, CZ, 01.11.2000)
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Tesař Ludvík, Berec Luděk, Dolanc G., Szederkényi G., Kadlec Jiří:
A toolbox for model-based fault detection and isolation
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European Control Conference. ECC '99,
VDI/VDE GMA,
(Karlsruhe 1999)
,
European Control Conference. ECC '99,
(Karlsruhe, DE, 31.08.1999-03.09.1999)
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Kadlec Jiří, Barbier A., de Castellane L., Gautier L.-P., Gourguechon S., Leroy S., Paturle A.:
Generation of Simulink S-functions,
ÚTIA AV ČR,
(Praha 1999)
Research Report 1975
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Hillerová E., Kadlec Jiří:
Informační den k programu IST,
Technologické centrum AV ČR,
(Praha 1999)
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Seminář k programu IST /5./,
(Praha, CZ, 23.09.1999)
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Kadlec Jiří, Matoušek Rudolf, Vialatte Christian, Coleman J. N.:
Port of Pascal FPGA-logarithmic-unit simulator to Simulink/RTW
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Sborník příspěvků 7. ročníku konference MATLAB '99, p. 84-90,
VŠCHT,
(Praha 1999)
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MATLAB '99 /7./,
(Praha, CZ, 03.11.1999)
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Vialatte Christian, Kadlec Jiří:
RTW support for low cost C31 board
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Sborník příspěvků 7. ročníku konference MATLAB '99, p. 231-237,
VŠCHT,
(Praha 1999)
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MATLAB '99 /7./,
(Praha, CZ, 03.11.1999)
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Kadlec Jiří:
Acceleration of computation-intensive algorithms on parallel Alpha AXP processors
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Preprints of the 3rd European IEEE Workshop on Computer-Intensive Methods in Control and Data Processing, p. 89-98
, Eds: Rojíček J., Valečková M., Kárný M., Warwick K.,
ÚTIA AV ČR,
(Praha 1998)
,
CMP'98 /3./,
(Praha, CZ, 07.09.1998-09.09.1998)
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Kárný Miroslav, Kadlec Jiří, Sutanto E. L.:
Quasi-Bayes estimation applied to normal mixture
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Preprints of the 3rd European IEEE Workshop on Computer-Intensive Methods in Control and Data Processing, p. 77-82
, Eds: Rojíček J., Valečková M., Kárný M., Warwick K.,
ÚTIA AV ČR,
(Praha 1998)
,
CMP '98 /3./,
(Praha, CZ, 07.09.1998-09.09.1998)
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Schier Jan, Kadlec Jiří, Böhm Josef:
Robust adaptive controller with fine grain parallelism
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Preprints of the IFAC Workshop on Adaptive Systems in Control and Signal Processing, p. 436-441,
IFAC,
(Glasgow 1998)
,
Adaptive Systems in Control and Signal Processing,
(Glasgow, GB, 26.08.1998-28.08.1998)
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Kadlec Jiří:
Parallel processing on Alphas under MATLAB 5
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SOFSEM '97: Theory and Practice of Informatics, p. 440-448
, Eds: Plášil F., Jeffery K. G.,
Springer,
(Berlin 1997)
Lecture Notes in Computer Science.
vol.1338
,
Seminar on Current Trends in Theory and Practice of Informatics /24./,
(Milovy, CZ, 22.11.1997-29.11.1997)
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Kadlec Jiří:
Para-Mat parallel processing under MATLAB
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Simulationstechnik. Tagungsband, p. 684-687
, Eds: Kuhn A., Wenzel S.,
Vieweg,
(Braunschweig 1997)
ASIM
vol.11
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Simulationstechnik. /11./,
(Dortmund, DE, 11.11.1997-14.11.1997)
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Kadlec Jiří:
Rapid prototyping and parallel processing under MATLAB 5
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Tagungsband. 3. Zittauer Workshop Magnetlagertechnik, p. 101-104
, Eds: Hampel R., Worlitz F.,
IPM,
(Zittau 1997)
Wissenschftliche Berichte.
vol.51
,
Zittauer Workshop Magnetlagertechnik /3./,
(Zittau, DE, 11.09.1997-12.09.1997)
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Nedoma Petr, Kadlec Jiří:
Extension of MATLAB parallel accelerator
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Computer-Intensive Methods in Control and Signal Processing. Preprints of the 2nd European IEEE Workshop CMP'96, p. 155-160
, Eds: Berec L., Rojíček J., Kárný M., Warwick K.,
ÚTIA AV ČR,
(Praha 1996)
,
European IEEE Workshop CMP'96 /2./,
(Prague, CZ, 28.08.1996-30.08.1996)
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Kadlec Jiří, Nakhaee N.:
Alpha Bridge - high performance computing with MATLAB
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Industrial Applications of MATLAB and Simulink for the Analysis of Electro- and Hydro- Mechanical Systems. Preprints, p. 11-16,
Matlab UG,
(Birmingham 1995)
,
Special Interest Meeting: Industrial Applications /1./,
(Birmingham, GB, 20.09.1995)
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Kadlec Jiří, Nakhaee N.:
Alpha-Bridge for MATLAB 4
,
Transputer Applications and Systems '95. Proceedings, p. 175-189
, Eds: Cook B. M., Nixon P.,
IOS Press,
(Harrogate 1995)
,
World Transputer Congress '95,
(Harrogate, GB, 04.09.1995-06.09.1995)
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Kadlec Jiří, Gaston F. M. F.:
Identification with directional parameter tracking for high-performance fixed-point implementations
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The Sixth Irish DSP and Control Colloquium, p. 215-222
, Eds: Gaston F., Dodds G.,
Techman,
(Belfast 1995)
,
IDSPCC '95 /6./,
(Belfast, IE, 19.06.1995-20.06.1995)
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McWhirter J. G., Walke R. L., Kadlec Jiří:
Normalised Givens rotations for recursive least squares processing
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VLSI Signal Processing, VIII, p. 313-322
, Eds: Nishitani T., Parhi K.,
IEEE,
(New York 1995)
,
IEEE Workshop on VLSI Signal Processing /8./,
(Sakai, JP, 16.10.1995-18.10.1995)
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Kadlec Jiří, Gaston F. M. F., Irwin G. W.:
The block regularised parameter estimator and its parallelisation
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Identification and Optimization, Oriented for Use in Adaptive Control. Preprints, p. 107-120
, Eds: Böhm J., Rojíček J.,
ÚTIA AV ČR,
(Praha 1995)
,
Summer School Course,
(Prague, CZ, 17.07.1995-18.07.1995)
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Kadlec Jiří:
[Recenze]
,
Automatica vol.31, 10 (1995), p. 1519-1521
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Kadlec Jiří:
Direct software bridge MATLAB-transputer boards
,
Signal Processing Conference. Proceedings, p. 1601-1604
, Eds: Covan C. F. N.,
EUSIPCO,
(Edinburgh 1994)
,
EUSIPCO '94. European Signal Processing Conference /7./,
(Edinburgh, GB, 13.09.1994-16.09.1994)
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Kadlec Jiří:
Lattice feedback regularised identification
,
10th IFAC Symposium on System Identification. Preprints, p. 277-282
, Eds: Blanke M., Söderström T.,
IFAC,
(Copenhagen 1994)
,
IFAC SYSID '94 /10./,
(Copenhagen, DK, 04.07.1994-06.07.1994)
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Kadlec Jiří:
Matlab transputer bridge. Abstract
,
10th IFAC Symposium on System Identification. Preprints, p. 31
, Eds: Blanke M., Söderström T.,
IFAC,
(Copenhagen 1994)
,
IFAC SYSID '94 /10./,
(Copenhagen, DK, 04.07.1994-06.07.1994)
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Kadlec Jiří:
Numerical analysis of normalized RLS filter using a probability description of propagated data
,
Algorithms and Parallel VLSI Architectures III, p. 61-72
, Eds: Moonen M., Catthor F.,
Elsevier,
(Amsterdam 1994)
,
Algorithms and Parallel VLSI Architectures /3./,
(Leuven, BE, 29.08.1994-31.08.1994)
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Kadlec Jiří:
Systolic arrays for identification of systems with variable structure
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Computer-Intensive Methods in Control and Signal Processing, p. 123-132
, Eds: Kulhavá L., Kárný M., Warwick K.,
ÚTIA AV ČR,
(Praha 1994)
,
IEEE Workshop CMP '94,
(Praha, CZ, 07.09.1994-09.09.1994)
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Gaston F. M. F., Kadlec Jiří, Schier Jan:
The block regularized linear quadratic optimal controller
,
IEE International Conference on Control '94, p. 1254-1259,
IEE,
(London 1994)
IEE.
vol.389
,
CONTROL '94,
(Warwick, GB, 21.03.1994-24.03.1994)
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Kadlec Jiří:
[Recenze]
,
Automatica vol.30, 5 (1994), p. 917-918
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Kadlec Jiří, Gaston F. M. F., Irwin G. W.:
A Nonlinear Systolic Filter with Radial Basis Function Estimation
,
Neural Computing Research and Applications, p. 183-190
, Eds: Hilger A.,
IOP Publ.,
(London 1993)
,
Neural Computing Research and Applications,
(Belfast, GB, 25.06.1992-26.06.1992)
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Kadlec Jiří, Gaston F. M. F., Irwin G. W.:
Regularised Lattice-Ladder Adaptive Filter
,
Mutual Impact of Computing Power and Control Theory, p. 245-257
, Eds: Kárný M., Warwick K.,
Plenum Press,
(New York 1993)
,
IFAC Workshop on the Mutual Impact of Computing Power and Control Theory,
(Prague, CZ, 01.09.1992-02.09.1992)
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Kadlec Jiří:
The Cell Level Description of Systolic Block Regularised QR Filter
,
VLSI Signal Processing, p. 298-306
, Eds: Eggermont L. D. J., Dewilde P.,
IEEE,
(New York 1993)
,
VLSI Signal Processing,
(Veldhoven, NL, 20.10.1993-22.10.1993)
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Kadlec Jiří:
The Lattice-Ladder with Generalized Forgetting
,
Linear Algebra for Large Scale and Real-Time Applications, p. 397-398
, Eds: Moonen M. S., Golub G. H., De Moor B. L. R.,
Kluwer Academic,
(Leuven 1993)
NATO ASI Series.
Series E: Applied Sciences.
vol.232
,
Proceedings of the NATO Advanced Study Institute on Linear Algebra for Large Scale and Real-Time Applications,
(Leuven, BE, 03.08.1992-14.08.1992)
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Kadlec Jiří:
Transputer Implementation of Block Regularised Filtering
,
Progress in Transputer Computing Technology, p. 1-15
, Eds: Kulhavá L., Schier J., Kárný M.,
ÚTIA AV ČR,
(Prague 1993)
,
International Workshop TCT '93,
(Prague, CZ, 04.05.1993-05.05.1993)
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Kadlec Jiří:
A Joint Criterion for Exponential Directional and Mixed Parameter Tracking
,
4th IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92, p. 687-692
, Eds: Landau I. D., Dugard L., M'Saad M.,
Laboratoire d'Automatique,
(Grenoble 1992)
,
IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92 /4./,
(Grenoble, FR, 01.07.1992-03.07.1992)
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Kadlec Jiří:
Fast Ladder-Lattice Identification Architecture with Numerically Robust Tracking of Parameters
,
Algorithms and Architectures for Real-Time Control, p. 105-111
, Eds: Fleming P. O., Jones D. I.,
Pergamon Press,
(Oxford 1992)
IFAC Workshop Series.
vol.4
,
IFAC Workshop on Algorithms and Architectures for Real-Time Control,
(Bangor, GB, 11.09.1991-13.09.1991)
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Kadlec Jiří, Gaston F. M. F., Irwin G. W.:
Parallel Implementation of Restricted Parameter Tracking
,
Mathematics in Signal Processing, p. 86-88,
University of Warwick,
(SouthendonSea 1992)
,
IMA Conference on Mathematics in Signal Processing /3./,
(Warwick, GB, 15.12.1992-17.12.1992)
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Kadlec Jiří, Gaston F. M. F., Irwin G. W.:
Regularised Lattice-Ladder Adaptive Filter
,
IFAC Workshop on Mutual Impact of Computing Power and Control Theory. MICC '92, p. 143-150
, Eds: Kárný M., Warwick K.,
ÚTIA ČSAV,
(Prague 1992)
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IFAC Workshop on Mutual Impact of Computing Power and Control Theory. MICC '92,
(Praha, CS, 01.09.1992-02.09.1992)
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Kadlec Jiří, Gaston F. M. F., Irwin G. W.:
Systolic Implementation of the Regularized Parameter Estimator
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VLSI Signal Processing 6, p. 520-529
, Eds: Yao K., Jain R., Przytula W., Rabaey J.,
IEEE,
(New York 1992)
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Workshop on VLSI Signal Processing,
(Napa, US, 28.10.1992-30.10.1992)
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Nedoma Petr, Kadlec Jiří, Schier Jan:
Tools for Implementation of Parallel Algorithms for Adaptive Control and Signal Processing
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4th IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92, p. 727-730
, Eds: Landau I. D., Dugard L., M'Saad M.,
Laboratoire d'Automatique,
(Grenoble 1992)
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IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92 /4./,
(Grenoble, FR, 01.07.1992-03.07.1992)
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