Position: head of the department
Research interests: Recursive system identification algorithms suitable for FPGA; rapid prototyping of advanced signal processing algorithms; Scalable floating point arithmetic for FPGA SoC designs
Publications at UTIA: list Email: ![](https://webarchiv.lib.cas.cz:443/wayback/20091211171049im_/http://www.utia.cas.cz/str2png.php?nid=102)
Phone: +420 26605 2216
Fax: +420 266052511
Address: Pod Vodárenskou věží 4, CZ-182 08, Praha 8, Czech Republic