Institute of Information Theory and Automation

Bibliography

Jan Schier

    Journal articles

    1. Šůcha P., Hanzálek Z., Heřmánek Antonín, Schier Jan: Scheduling of Iterative Algorithms with Matrix Operations for Efficient FPGA Design—Implementation of Finite Interval Constant Modulus Algorithm , Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology vol.46, 1 (2007), p. 35-53 (2007) Download
    2. Kadlec Jiří, Schier Jan: Analysis of a normalized QR filter using Bayesian description of propagated data , International Journal of Adaptive Control and Signal Processing vol.13, 6 (1999), p. 487-505 (1999)
    3. Schier Jan: Estimation of transport delay using parallel recursive modified Gram-Schmidt algorithm , International Journal of Adaptive Control and Signal Processing vol.11, 5 (1997), p. 431-442 (1997) Download
    4. Schier Jan: Inverse updated systolic RLS algorithm with regularized exponential forgetting , Kybernetika vol.32, 3 (1996), p. 209-234 (1996) Download
    5. Schier Jan: A systolic algorithm for block-regularized RLS identification , Integration, the VLSI Journal vol.20, p. 85-100 (1995) Download

    Other publications

    1. Schier Jan: Counting of yeast colonies in Petri dish images, ( 2009) (2009)
    2. Schier Jan: Preprocessing of images of Petri dishes, ( 2009) (2009)
    3. Schier Jan, Kovář Bohumil: Using Matlab in quantitative analysis of yeast growth , Technical Computing Prague 2009, Technical Computing Prague 2009, (Praha, CZ, 19.11.2009) (2009) Download
    4. Kovář Bohumil, Kloub Jan, Schier Jan, Heřmánek Antonín: Rapid Prototyping Platform For Reconfigurable Image Processing , Technical computing Prague 2008. 16th annual conference proceedings, Technical Computing Prague 2008 /16./, (Praha, CZ, 11.11.2008-11.11.2008) (2008) Download
    5. Kloub Jan, Schier Jan: Vyhodnocování růstu kolonií kvasinek Saccharomyces cerevisia s použitím akcelerátoru Uni1P/DX64, ( 2008) (2008)
    6. Schier Jan, Kovář Bohumil, Zemčík P., Herout A., Zuzaňák J.: Configuration System for a DSP/FPGA-Based Embedded Accelerator , Digital Technologies 2007 Book of Abstracts , Eds: Jarina Roman, Digital Technologies 2007, (Žilina, SK, 30.11.2007) (2007)
    7. Schier Jan, Kovář Bohumil, Zuzaňák J.: Configuration System for a DSP/FPGA-Based Embedded Accelerator , Digital Technologies 2007 Proceedings , Eds: Jarina Roman, Digital Technologies 2007, (Žilina, SK, 29.11.2007-30.11.2007) (2007)
    8. Kadlec Jiří, Daněk Martin, Schier Jan, Kohout Lukáš, Kafka Leoš, Kloub Jan, Stejskal Jaroslav, Svozil Jiří: Identifikace limitací dosavadních technologií v kontextu projektu VLAM, ÚTIA AV ČR, (Praha 2007) Research Report 2183 (2007)
    9. Kovář Bohumil, Schier Jan: Kompresní algoritmy a jejich implementace, ( 2007) (2007)
    10. Kovář Bohumil, Schier Jan: Kompresní algoritmy a jejich implementace, ÚTIA AV ČR, (Praha 2007) Research Report 2191 (2007)
    11. Kovář Bohumil, Schier Jan, Zemčík P., Herout A., Zuzaňák J.: Simulink Model Converter for Embedded Video Accelerator , Technical Computing Prague 2007, Technical Computing Prague 2007, (Praha, CZ, 14.11.2007-14.11.2007) (2007)
    12. Schier Jan, Kovář Bohumil: A DSP/FPGA-based accelerator for video , Digital Technologies 2006, p. 1-5, Digital Technologies 2006, (Žilina, SK, 01.12.2006) (2006)
    13. Schier Jan, Kovář Bohumil: A DSP/FPGA-based accelerator for video processing , Digital Technologies 2006 Book of Abstracts, p. 13-13, Digital Technologies 2006, (Žilina, SK, 01.12.2006) (2006)
    14. Tichý Milan, Schier Jan, Gregg D.: Efficient Floating-Point Implementation of High-Order (N)LMS Adaptive Filters in FPGA , Reconfigurable Computing: Architecures and Applications. Proceedings of the Second International Workshop ARC, p. 311-316 , Eds: Bertels K., Cardoso J. M. P., Vassiliadis S., The Second International Workshop on Reconfigurable Computing ARC 2006, (Delft, NL, 01.03.2006-03.03.2006) (2006)
    15. Šůcha P., Hanzálek Z., Heřmánek Antonín, Schier Jan: Efficient FPGA Implementation of Equalizer for Finite Interval Constant Modulus Algorithm , IEEE Symposium on Industrial Embedded Systems - IES 2006, Proceedings of, p. 1-10, IEEE Symposium on Industrial Embedded Systems - IES 2006, (Antibes Juan-Les-Pins, FR, 18.10.2006-20.10.2006) (2006)
    16. Tichý Milan, Schier Jan, Gregg D.: FPGA Implementation of Adaptive Filters based on GSFAP using Log Arithmetic , Proceedings of The 2006 IEEE Workshop on Signal Processing Systems Design and Implementation, p. 342-347 , Eds: Badawy W., Boumaiza S., IEEE Workshop on Signal Processing Systems Design and Implementation. 2006, (Banff, CA, 02.10.2006-04.10.2006) (2006)
    17. Kovář Bohumil, Schier Jan, Zemčík P., Herout A., Beran V.: Simulink as Tool for Prototyping Reconfigurable Image Processing Applications , Technical computing Prague 2006. 14th annual conference proceedings, p. 52-57 , Eds: Procházka A., Technical computing Prague 2006 /14./, (Prague, CZ, 26.10.2006) (2006)
    18. Heřmánek Antonín, Schier Jan: FPGA implementation of Finite Interval CMA , Proceedings of the first annual IEEE BENELUX/DSP Valley Signal Processing Symposium. SPS-DARTS 2005, p. 97-100, IEEE, (Antverpy 2005) , SPS-DARTS 2005 Signal Processing Symposium /1./, (Antverpy, BE, 19.04.2005-20.04.2005) (2005)
    19. Heřmánek Antonín, Schier Jan, Šůcha P., Hanzálek Z.: Optimization of finite interval CMA implementation for FPGA , Proceedings of the IEEE Workshop on Signal Processing Systems. SiPS 2005, p. 1-6, IEEE, (Athens 2005) , SiPS 2005. IEEE Workshop on Signal Processing Systems, (Athens, GR, 02.11.2005-04.11.2005) (2005)
    20. Šůcha P., Heřmánek Antonín, Schier Jan, Hanzálek Z.: Optimization of Finite Interval CMA Implementation for FPGA, ÚTIA AV ČR, (Praha 2005) Research Report 2127 (2005)
    21. Zemčík P., Herout A., Beran V., Fučík A., Schier Jan: Reconfigurable image processing architecture , ICGST International Conference on Graphics, Vision and Image Processing. GVIP-05, p. 1-6, International Conference on Graphics, Vision and Image Processing, (Káhira, EG, 19.12.2005-21.12.2005) (2005)
    22. Schier Jan, Kovář Bohumil, Zemčík P., Herout A., Beran V.: Reconfigurable image processing architecture with simulink prototyping support , Technical Computing Prague 2005. 13th Annual Conference Proceeding, p. 1-4 , Eds: Moler C., Procházka A., Walden B., MATLAB 05. Annual Conference of Technical Computing Prague 2005 /13./, (Praha, CZ, 15.11.2005) (2005)
    23. Heřmánek Antonín, Schier Jan, Regalia P.: Architecture design for FPGA implementation of finite interval CMA , Proceedings of the 12th European Signal Processing Conference, p. 1-4 , Eds: Hlawatsch F., Matz G., Rupp M., EUSIPCO 2004 /12./, (Vienna, AT, 06.09.2004-10.09.2004) (2004)
    24. Schier Jan, Heřmánek Antonín: FPGA implementation of recursive QR update using LNS arithmetic , Proceedings of the 4th IEEE Benelux Signal Processing Symposium, p. 1-4, SPS 2004 /4./, (Hilvarenbeek, NL, 15.04.2004-16.04.2004) (2004)
    25. Schier Jan, Heřmánek Antonín: Using logarithmic arithmetic to implement the Recursive Least Squares (QR) algorithm in FPGA , Field-Programmable Logic and Applications. 14th International Conference FPL 2004. Proceedings, p. 1149-1151, International Conference FPL 2004 /14./, (Antverp, BE, 30.08.2004-01.09.2004) (2004)
    26. Líčko Miroslav, Schier Jan: FPGA Prototyping Using Extensions to MATLAB/Simulink , UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-3 , Eds: Hettiaratchi S., University of Southampton, (Southampton 2003) , UK ACM SIGDA Workshop on Electronic Design Automation /3./, (Southampton, GB, 11.09.2003-12.09.2003) (2003)
    27. Pohl Zdeněk, Schier Jan, Líčko Miroslav, Heřmánek Antonín, Tichý Milan: Logarithmic arithmetic for real data types and support for Matlab/Simulink based rapid-FPGA-prototyping , Proceedings of the International Parallel and Distributed Processing Symposium. IPDPS 2003, p. 1-6 , Eds: Werner B., IEEE Computer Society Press, (Los Alamitos 2003) , IEEE IPDPS 2003, (Nice, FR, 22.04.2003-26.04.2003) (2003)
    28. Líčko Miroslav, Schier Jan, Tichý Milan, Kühl M.: MATLAB/Simulink based methodology for rapid-FPGA-prototyping , Field-Programmable Logic and Applications. Proceedings of the 13th International Conference, p. 984-987 , Eds: Cheung P. Y. K., Constantinides G. A., de Sousa J. T., Springer, (Berlin 2003) Lecture Notes in Computer Science. vol.2778 , Field-Programmable Logic and Applications /13./, (Lisabon, PT, 01.09.2003-03.09.2003) (2003)
    29. Schier Jan: QR-RLS - Celoxica RC1000 Demo. (Program), ÚTIA AV ČR, (Praha 2003) (2003)
    30. Schier Jan, Kadlec Jiří: Using logarithmic arithmetic for FPGA implementation of the Givens rotations , Proceedings of the Sixth Baiona Workshop on Signal Processing in Communications, p. 199-204 , Eds: Mosquera C., Perez-Gonzales F., Universidade de Vigo, (Vigo 2003) , Baiona Workshop on Signal Processing Communications /6./, (Baiona, ES, 08.09.2003-10.09.2003) (2003)
    31. Líčko Miroslav, Schier Jan, Pohl Zdeněk, Kadlec Jiří, Tichý Milan, Matoušek Rudolf, Heřmánek Antonín: Logarithmic Arithmetic for Real Data Types and Support for MATLAB/SIMULINK Based Rapid-FPGA-Prototyping, ÚTIA AV ČR, (Praha 2002) Research Report 2069 (2002)
    32. Schier Jan: Using the System-C library for bit-true simulations in MATLAB , MATLAB 2002. Sborník příspěvků 10. ročníku konference, p. 497-504, VŠCHT, (Praha 2002) , MATLAB 2002, (Praha, CZ, 07.11.2002) (2002)
    33. Schier Jan, Kadlec Jiří, Moonen M.: Implementing Advanced Equalization Algorithms using Simulink with Embedded Alpha AXP Coprocessor, ÚTIA AV ČR, (Praha 2001) Research Report 2013 (2001)
    34. Schier Jan, Kadlec Jiří, Moonen M.: Implementing advanced equalization algorithms using Simulink with embedded Alpha AXP coprocessor , Fifth IMA International Conference on Mathematics in Signal Processing, p. 11-14, University of Warwick, (Warwick 2000) , Mathematics in Signal Processing /5./, (Warwick, GB, 18.12.2000-20.12.2000) (2000)
    35. Schier Jan: Fast fixed-point algorithm for estimation of the system time lag , Preprints of the 3rd European IEEE Workshop on Computer-Intensive Methods in Control and Data Processing, p. 151-154 , Eds: Rojíček J., Valečková M., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1998) , CMP'98 /3./, (Praha, CZ, 07.09.1998-09.09.1998) (1998)
    36. Kadlec Jiří, Schier Jan: HSLA DSP Package, ÚTIA AV ČR, (Praha 1998) Research Report 1924 (1998) Download
    37. Kadlec Jiří, Schier Jan: HSLA 3D Monitor Package, ÚTIA AV ČR, (Praha 1998) Research Report 1925 (1998) Download
    38. Kadlec Jiří, Schier Jan: Numerical Analysis of a Normalized QR Filter Using Probability Description of Propagated Data, ÚTIA AV ČR, (Praha 1998) Research Report 1923 (1998) Download
    39. Schier Jan, van Gemund A. J. C.: PTT and OTT Enhancement: Part 2. Final Report, Technical University, (Delft 1998) Research Report 1-68340-44(1998)04 (1998) Download
    40. Kadlec Jiří, Schier Jan: Rapid prototyping of adaptive control algorithms on parallel multiprocessors , Signal Processing Symposium, p. 115-118, IEEE, (Leuven 1998) , SPS '98, (Leuven, BE, 26.03.1998-27.03.1998) (1998) Download
    41. Schier Jan, van Gemund A. J. C., Reijns G. L.: Real-time signal processing for an obstacle warning radar , Signal Processing Symposium, p. 167-170, IEEE, (Leuven 1998) , SPS '98, (Leuven, BE, 26.03.1998-27.03.1998) (1998)
    42. Kadlec Jiří, Schier Jan: Results of the Global Probability Analysis Approach, ÚTIA AV ČR, (Praha 1998) Research Report 1926 (1998) Download
    43. Schier Jan, Kadlec Jiří, Böhm Josef: Robust adaptive controller with fine grain parallelism , Preprints of the IFAC Workshop on Adaptive Systems in Control and Signal Processing, p. 436-441, IFAC, (Glasgow 1998) , Adaptive Systems in Control and Signal Processing, (Glasgow, GB, 26.08.1998-28.08.1998) (1998) Download
    44. Swart P. J. F., Schier Jan, van Gemund A. J. C., van der Zwan W. F, Karelse J. P., Reijns G. L., van Genderen P., Ligthart L. P., Steenstra H. T.: The COLORADO multistatic FMCW radar system , European Microwave. Proceedings, p. 449-454, Europeam Microwave Association, (London 1998) , European Microwave /28./, (Amsterdam, NL, 06.10.1998-08.10.1998) (1998)
    45. Schier Jan, Agterkamp H. J., van Gemund A. J. C., Reijns G. L., Lin H. X.: Object tracking and tracing for multi-static FM-CW radar - incremental approach , Computer-Intensive Methods in Control and Signal Processing. Preprints of the 2nd European IEEE Workshop CMP'96, p. 151-154 , Eds: Berec L., Rojíček J., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1996) , European IEEE Workshop CMP'96 /2./, (Prague, CZ, 28.08.1996-30.08.1996) (1996)
    46. Schier Jan, van Gemund A. J. C.: PTT and OTT Enhancement - Final Report, University of Technology, (Delft 1996) Research Report 1-68340-44(1996)10 (1996)
    47. Schier Jan, Lin H. X., van Gemund A. J. C.: Colorado System: Peak Tracking and Tracing Algorithm and its Parallel Implementation, Technische Universiteit, (Delft 1995) Research Report 95-101 (1995)
    48. Schier Jan: A systolic algorithm for block-regularized RLS identification , Algorithms and Parallel VLSI Architectures III, p. 49-60 , Eds: Moonen M., Catthor F., Elsevier, (Amsterdam 1994) , Algorithms and Parallel VLSI Architectures /3./, (Leuven, BE, 29.08.1994-31.08.1994) (1994)
    49. Schier Jan: A Systolic Algorithm for the Block-Regularised RLS Identification, ÚTIA AV ČR, (Praha 1994) Research Report 1807 (1994)
    50. Schier Jan: A systolic algorithm for the block-regularized RLS identification. Abstract , Algorithms and Parallel VLSI Architectures. Abstracts, p. -, Katholieke Universiteit, (Leuven 1994) , International Workshop on Algorithms and Parallel VLSI Architectures /3./, (Leuven, BE, 29.08.1994-31.08.1994) (1994)
    51. Schier Jan: Parallel Algorithms for Robust Adaptive Identification and Square-Root LQG Control Synthesis. Dr.Dissertation, FJFI ČVUT, (Praha 1994) (1994) Download
    52. Schier Jan: Systolic algorithms for adaptive control, implementation in the Matlab environment , Distributed Control. Proceedings, p. 103-113, ČVUT FEL, (Praha 1994) , Distributed Control: TEMPUS IMPACT Workshop, (Praha, CZ, 19.05.1994-20.05.1994) (1994)
    53. Schier Jan: Systolic Algorithms for Adaptive Control, Implementation in the Matlab Environment, ÚTIA AV ČR, (Praha 1994) Research Report 1808 (1994)
    54. Gaston F. M. F., Kadlec Jiří, Schier Jan: The Block Regularised Linear Quadratic Optimal Controller, ÚTIA AV ČR, (Praha 1994) Research Report 1789 (1994)
    55. Gaston F. M. F., Kadlec Jiří, Schier Jan: The block regularized linear quadratic optimal controller , IEE International Conference on Control '94, p. 1254-1259, IEE, (London 1994) IEE. vol.389 , CONTROL '94, (Warwick, GB, 21.03.1994-24.03.1994) (1994) Download
    56. Schier Jan: The systolic regularized linear quadratic controller , Computer-Intensive Methods in Control and Signal Processing, p. 133-140 , Eds: Kulhavá L., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1994) , IEEE Workshop CMP '94, (Praha, CZ, 07.09.1994-09.09.1994) (1994)
    57. Schier Jan: The Systolic Regularized Linear Quadratic Controller, ÚTIA AV ČR, (Praha 1994) Research Report 1815 (1994)
    58. Schier Jan: A Systolic Block-Regularized Algorithm for the Recursive Least Squares Identification with the Inverse Update, ÚTIA AV ČR, (Praha 1993) Research Report 1771 (1993)
    59. Schier Jan: Fast quality evaluation in preliminary tuning of adaptive controller , Progress in Transputer Computing Technology, p. 33-44 , Eds: Kulhavá L., Schier J., Kárný M., ÚTIA AV ČR, (Praha 1993) , International Workshop TCT '93, (Praha, CZ, 04.05.1993-05.05.1993) (1993)
    60. Kulhavá Lenka, Schier Jan, Kárný Miroslav: Progress in Transputer Computing Technology , , ÚTIA AV ČR, (Praha 1993) , International Workshop TCT '93, (Praha, CZ, 04.05.1993-05.05.1993) (1993)
    61. Schier Jan: A Parallel Algorithm for Estimation of the System Structure , Binary Control '92, p. -, Czech Technical University, (Prague 1992) , Binary Control '92, (Prague, CS, 14.09.1992-22.09.1992) (1992)
    62. Nedoma Petr, Schier Jan: CAD systémů řízení s transputery , TRANSPUTER CS'92. Zborník prednášok, p. -, Ústav počítačových systémov, (Bratislava 1992) , TRANSPUTER CS '92, (Bratislava, CS, 16.09.1992) (1992)
    63. Schier Jan: Estimation of Transport Delay Using Parallel Recursive Modified Gramm-Schmidt Algorithm, ÚTIA ČSAV, (Praha 1992) Research Report 1753 (1992)
    64. Nedoma Petr, Kadlec Jiří, Schier Jan: Tools for Implementation of Parallel Algorithms for Adaptive Control and Signal Processing , 4th IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92, p. 727-730 , Eds: Landau I. D., Dugard L., M'Saad M., Laboratoire d'Automatique, (Grenoble 1992) , IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92 /4./, (Grenoble, FR, 01.07.1992-03.07.1992) (1992)
    Responsible for information: admin
    Last modification: 03.09.2008
    Institute of Information Theory and Automation