Project GA102/04/2137

Journal articles

1. Matoušek Rudolf, Daněk Martin, Kubátová H.: Perspektivy dynamické rekonfigurace programovatelných polí FPGA , Sdělovací technika vol.54, 4 (2006), p. 3-6 (2006)
2. Daněk Martin, Honzík Petr, Kadlec Jiří, Pohl Zdeněk, Matoušek Rudolf: Platforma s částečnou dynamickou rekonfigurací FPGA , Automa vol.12, 5 (2006), p. 40-43 (2006)
3. Daněk Martin: Programovatelná hradlová pole - FPGA , Automa vol.12, 2 (2006), p. 9-13 (2006)
4. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk: Reconfigurable system on programmable chip platform , ATMEL Applications Journal, p. 9-12 (2005)

Other publications

1. Kadlec Jiří, Daněk Martin: Design and verification methodology for reconfigurable designs in Atmel FPSLIC , Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 79-80 , Eds: Reorda M. S., Novák O., Straube B., DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems, (Prague, CZ, 18.04.2006-21.04.2006) (2006)
2. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf: Dynamic reconfiguration in FPGA-based SoC designs. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, p. 274 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) (2005)
3. Kafka Leoš, Kubalík P., Kubátová H., Novák O.: Fault classification for self-checking circuits implemented in FPGA , Proceedings of the 8th IEEE Workshop on Design and Diagnostics of Electronics Circuits and Systems, p. 228-231 , Eds: Takách G., Hlawiczka A., Sziray J., University of West Hungary, (Sopron 2005) , IEEE Design and Diagnostics of Electronics Circuits and Systems Workshop /8./, (Sopron, HU, 13.04.2005-16.04.2005) (2005)
4. Daněk Martin, Pohl Zdeněk, Nasi K., Karoubalis T.: Figaro - an automatic tool flow for designs with dynamic reconfiguration , Proceedings of the 2005 International Conference on Field Programmable Logic and Applications. FPL 2005, p. 590-593 , Eds: Rissa T., Wilton S., Leong P., FPL 2005. International Conference on Field Programmable Logic and Applications, (Tampere, FI, 22.08.2006-26.08.2005) (2005)
5. Nasi K., Daněk Martin, Karoubalis T., Pohl Zdeněk: Figaro: An automatic tool flow for designs with dynamic reconfiguration. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, p. 262 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) (2005)
6. Honzík Petr: Communication Library for AVR Microcontrollers, ÚTIA AV ČR, (Praha 2004) Research Report 2110 (2004)
7. Daněk Martin, Matoušek Rudolf: FLASH Formatter for the FLASH Expansion Board, ÚTIA AV ČR, (Praha 2004) Research Report 2112 (2004)
8. Daněk Martin, Matoušek Radomil: FLASH Read Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2114 (2004)
9. Daněk Martin, Kolář J.: FPGA modelling for high-performance algorithms. Abstract , FPGA 2004 ACM/SIGDA Twelfth International Symposium on Field-Programmable Gate Arrays, p. 251, FPGA 2004 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays /12./, (Monterey, US, 22.02.2004-24.02.2004) (2004)
10. Honzík Petr: Getting Started with AVG-GCC, ÚTIA AV ČR, (Praha 2004) Research Report 2115 (2004)
11. Daněk Martin, Matoušek Rudolf: Overlay Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2113 (2004)
12. Daněk Martin, Matoušek Rudolf: Random Access FLASH Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2111 (2004)
13. Kadlec Jiří, Daněk Martin, Honzík Petr: Reconfigurable Scrolling Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2117 (2004)
14. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk: Reconfigurable system-on-a-programmable-chip platform , Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, p. 21-28, IEEE Workshop on DDECS 2004 /7./, (Stará Lesná, SK, 18.04.2004-21.04.2004) (2004)
15. Kadlec Jiří, Daněk Martin, Honzík Petr: Reconfigurable 24-Bit Floating-Point Coprocessor Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2116 (2004)