Kadlec Jiří, Daněk Martin:
Design and verification methodology for reconfigurable designs in Atmel FPSLIC
, Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 79-80
, Eds: Reorda M. S., Novák O., Straube B., DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems,
(Prague, CZ, 18.04.2006-21.04.2006) (2006)
Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf:
Dynamic reconfiguration in FPGA-based SoC designs
, Proceedings of the 8th IEEE Workshop on Designs and Diagnostics of Electronic Circuits nad Systems, p. 129-136
, Eds: Takách G., Hlawiczka A., Sziraj J., University of West Hungary,
(Sopron 2005)
, IEEE Design and Diagnostics of Electronic Circuits nad Systems Workshop (DDECS 2005) /8./,
(Sopron, HU, 13.04.2005-16.04.2005) (2005)
Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf:
Dynamic reconfiguration in FPGA-based SoC designs
, ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 35-38
, Eds: Bosschere K., HiPEAC Network of Excellence,
(Ghent 2005)
, ACACES 2005.,
(L'Aquila, IT, 26.07.2005) (2005)
Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří:
Dynamic reconfiguration of Atmel FPGAs
, UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-4
, Eds: Hettiaratchi S., University of Southampton,
(Southampton 2003)
, UK ACM SIGDA Workshop on Electronic Design Automation /3./,
(Southampton, GB, 11.09.2003-12.09.2003) (2003)
Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří:
Dynamic reconfiguration of FPGAs
, Recent Trends in Multimedia Information Processing. Proceedings, p. 288-291
, Eds: Šimák B., Zahradník P., Czech Technical University,
(Prague 2003)
, International Workshop on Systems, Signals and Image Processing /10./,
(Praha, CZ, 10.09.2003-11.09.2003) (2003)
Matoušek Rudolf:
Dynamic reconfiguration of FPGAs: a case study
, Počítačové Architektury & Diagnostika PAD 2003, p. 17-23
, Eds: Kotásek Z., Růžička R., Sekanina L., VUT,
(Brno 2003)
, PAD 2003 Počítačové Architektury & Diagnostika,
(Zvíkovské Podhradí, CZ, 24.09.2003-26.09.2003) (2003)
Matoušek Rudolf, Daněk Martin, Pohl Zdeněk, Kadlec Jiří:
Dynamic runtime partial reconfiguration in FPGA
, ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, p. 294-298
, Eds: Nouza J., Drábková J., Technical University,
(Liberec 2003)
, ECMS 2003 /6./,
(Liberec, CZ, 02.06.2003-04.06.2003) (2003)
Heřmánek Antonín, Pohl Zdeněk, Kadlec Jiří:
FPGA implementation of the adaptive lattice filter
, Field-Programmable Logic and Applications. Proceedings of the 13th International Conference, p. 1095-1098
, Eds: Cheung P. Y. K., Constantinides G. A., de Sousa J. D., Springer,
(Berlin 2003)
Lecture Notes in Computer Science.
vol.2778
, Field Programmable Logic and Applications /13./,
(Lisabon, PT, 01.09.2003-03.09.2003) (2003)
Líčko Miroslav, Schier Jan:
FPGA Prototyping Using Extensions to MATLAB/Simulink
, UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-3
, Eds: Hettiaratchi S., University of Southampton,
(Southampton 2003)
, UK ACM SIGDA Workshop on Electronic Design Automation /3./,
(Southampton, GB, 11.09.2003-12.09.2003) (2003)
Schier Jan, Kadlec Jiří:
Using logarithmic arithmetic for FPGA implementation of the Givens rotations
, Proceedings of the Sixth Baiona Workshop on Signal Processing in Communications, p. 199-204
, Eds: Mosquera C., Perez-Gonzales F., Universidade de Vigo,
(Vigo 2003)
, Baiona Workshop on Signal Processing Communications /6./,
(Baiona, ES, 08.09.2003-10.09.2003) (2003)
Odpovědnost za obsah: admin Poslední změny: 03.10.2009