Institute of Information Theory and Automation

Bibliography

Jiří Kadlec

Books and chapters

  1. Hillerová E., Kadlec Jiří: Czech Republic, Information Society Technology, ÚTIA AV ČR, (Praha 1999) (1999)
  2. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: Parallel implementation of restricted parameter tracking , Mathematics in Signal Processing, p. 315-325 , Eds: McWhirter J. G., Clarendon Press, (Oxford 1994) Institute of Mathematics and its Applications Conference Series. vol.49 (1994)

Journal articles

  1. Pohl Zdeněk, Tichý Milan, Kadlec Jiří: Implementation of the Least-Squares Lattice with Order and Forgetting Factor Estimation for FPGA , EURASIP Journal on Advances in Signal Processing vol.2008, 2008 (2008), p. 1-11 (2008) Download
  2. Coleman J. N., Softley C. I., Kadlec Jiří, Matoušek R., Tichý Milan, Pohl Zdeněk, Heřmánek Antonín, Benschop N. F.: The European Logarithmic Microprocessor , IEEE Transactions on Computers vol.57, 4 (2008), p. 532-546 (2008) Download
  3. Kadlec Jiří, Vaculíková E.: ARTEMIS - šance pro výzkum v oboru vestavných systémů - polemika , Automa vol.13, 10 (2007), p. 13-15 (2007)
  4. Kadlec Jiří, Chappel S.: Implementing floating-point DSP , Embedded Magazine vol.2, 3 (2006), p. 12-14 (2006) Download
  5. Daněk Martin, Honzík Petr, Kadlec Jiří, Pohl Zdeněk, Matoušek Rudolf: Platforma s částečnou dynamickou rekonfigurací FPGA , Automa vol.12, 5 (2006), p. 40-43 (2006)
  6. Kadlec Jiří, Vaculíková E.: Podpora projektů informační a komunikační techniky v 7.rámcovém programu EU pro výzkum , Automa vol.13, 5 (2006), p. 82-83 (2006)
  7. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk: Reconfigurable system on programmable chip platform , ATMEL Applications Journal, p. 9-12 (2005)
  8. Kadlec Jiří, Albrecht V.: Význam účasti v projektech EU , Echo vol.2, 2 (2005), p. 11-13 (2005)
  9. Kadlec Jiří: IDEALIST: Jak najít partnery pro projekty IST , Echo, p. 13 (2004)
  10. Kadlec Jiří, Matoušek Rudolf, Heřmánek Antonín, Líčko Miroslav, Tichý Milan: Lattice for FPGAs using logarithmic arithmetic , Electronic Engineering vol.74, 906 (2002), p. 53-56 (2002)
  11. Coleman J. N., Chester E. I., Softley C. I., Kadlec Jiří: Arithmetic on the European Logarithmic Microprocessor , IEEE Transactions on Computers vol.49, 7 (2000), p. 702-715 (2000)
  12. Kadlec Jiří: Konkrétní příležitost pro firmy z ČR: Projekty take-up programu IST s termínem podání 31.10.2000 , Automa vol.6, 7 (2000), p. 104 (2000)
  13. Hlavička J., Kadlec Jiří: Vstup do evropské informační společnosti - program IST , Automa vol.6, 7 (2000), p. 105-107 (2000)
  14. Kadlec Jiří, Schier Jan: Analysis of a normalized QR filter using Bayesian description of propagated data , International Journal of Adaptive Control and Signal Processing vol.13, 6 (1999), p. 487-505 (1999)
  15. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: A parallel fixed-point predictive controller , International Journal of Adaptive Control and Signal Processing vol.11, 5 (1997), p. 415-430 (1997) Download
  16. Kadlec Jiří: Transputer implementation of block regularized filtering , Kybernetika vol.32, 3 (1996), p. 235-250 (1996)
  17. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: The block regularised parameter estimator and its parallelisation , Automatica vol.31, 8 (1995), p. 1125-1136 (1995) Download
  18. Kadlec Jiří, Masarik G., Nguyen D. H.: Paralelní počítače a superpočítače dneška , Computer World vol.10, 10 (1991), p. 18-19 (1991)

Other publications

  1. Kadlec Jiří, Kadlecová Milada: ARTEMIS / ENIAC Joint Undertaking - Seminář ke 2. výzvě, (Praha, CZ, 02.03.2009) (2009)
  2. Kadlec Jiří: Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1|10|20|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final, ( 2009) (2009)
  3. Kadlec Jiří: Floating Point Accelerator Families bce_fp01_1x1_0_plbw_v1_|10|20|30|_a bce_fp01_1x2_0_plbw_v1_|10|20|30|40|_a for Xilinx Spartan3 DSP 1800 Board and Petalogix Petalinux-v0.40-final, ( 2009) (2009)
  4. Daněk Martin, Kadlec Jiří, Nelson B.: Proceedings 19th International Conference on Field Programmable Logic and Applications (FPL), ÚTIA AV ČR, (Praha 2009) , FPL 2009 19th International Conference on Field Programmable Logic and Applications, (Praha, CZ, 31.08.2009-02.09.2009) (2009)
  5. Pohl Zdeněk, Kadlec Jiří, Tichý Milan: Adaptive Noise Canceller Migration Demo, ( 2008) (2008)
  6. Kadlec Jiří, Kadlecová Milada: ARTEMIS / ENIAC Joint Undertaking Information event, (Praha, CZ, 16.05.2008) (2008)
  7. Kadlec Jiří: Design Flow for Reconfigurable MicroBlaze Accelerators , 4th International Workshop on Reconfigurable Communication Centric System-on-Chips Workshop Proceedings , Eds: Moreno Manuel J., Madrenas Jordi, Sassatelli Gilles, Hübner Michael, Zipf Peter, ReCoSoC 2008 4th Reconfigurable Communication-centric Systems-on-Chip workshop, (Barcelona, ES, 09.07.2008-11.07.2008) (2008)
  8. Daněk Martin, Kadlec Jiří, Bartosinski Roman, Kohout Lukáš: Increasing the Level of Abstraction in FPGA-based Designes , International Conference on Field Programmable Logic and Applications , Eds: Kebschull Udo, International Conference on Field Programmable Logic and Applications, (Heidelberg, DE, 08.09.2008-10.09.2008) (2008) Download
  9. Svozil Jiří, Stejskal Jaroslav, Kafka Leoš, Kadlec Jiří: PicoBlaze lekce 4: Aplikace pro výuku asembleru procesoru PicoBlaze, ( 2008) (2008)
  10. Kadlec Jiří, Daněk Martin, Kohout Lukáš: Proposed architecture of configurable, adaptable SoC , The IET Irish Signals and Systems Conference ISSC 2008 , Eds: Morgan Fearghal, Glavin Martin, Jones Edward, The Institution of Engineering and Technology Irish Signals and Systems Conference, ISSC 2008, (Galway, IE, 18.06.2008-19.06.2008) (2008)
  11. Stejskal Jaroslav, Svozil Jiří, Kafka Leoš, Kadlec Jiří: Řadiče periferií pro vývojovou desku Spartan3E Starter Kit, ( 2008) (2008)
  12. Kadlec Jiří, Kadlecová Milada, Daněk Martin: Workshop on Embedded Systems Education and Training, (Athény, GR, 05.06.2008) (2008)
  13. Kadlec Jiří, Bartosinski Roman, Daněk Martin: Accelerating MicroBlaze Floating Point Operations , Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL) , Eds: Bertels Koen, Najjar Walid, Genderen Arjan, Vassiliadis Stamatis, International Conference on Field Programmable Logic and Applications. FPL 2007, (Amsterdam, NL, 27.08.2007-29.08.2007) (2007)
  14. Pohl Zdeněk, Kadlec Jiří, Tichý Milan: Adaptive Noise Canceller Demo based on the LS Lattice Filter, ( 2007) (2007)
  15. Kadlec Jiří: Embedded Development Environment for a Family of Xilinx FPGA , Regional Conference on Embedded and Ambient Systems Book of Abstracts , Eds: Varga Antila K., Kiss Ákos, Marsiske Stefan, Vásárhelyi József, RCEAS 2007 First Regional Conference on Embedded and Ambient Systems, (Budapešť, HU, 22.11.2007-24.11.2007) (2007)
  16. Kadlec Jiří, Daněk Martin, Schier Jan, Kohout Lukáš, Kafka Leoš, Kloub Jan, Stejskal Jaroslav, Svozil Jiří: Identifikace limitací dosavadních technologií v kontextu projektu VLAM, ÚTIA AV ČR, (Praha 2007) Research Report 2183 (2007)
  17. Bartosinski Roman, Daněk Martin, Honzík Petr, Kadlec Jiří: Modelling Self-Adaptive Networked Entities in Matlab/Simulink , Technical Computing Prague 2007, Technical Computing Prague 2007, (Praha, CZ, 14.11.2007-14.11.2007) (2007)
  18. Svozil Jiří, Kafka Leoš, Kadlec Jiří: PicoBlaze lekce 1: assembler, C překladač a simulační prostředí, ÚTIA AV ČR, (Praha 2007) (2007)
  19. Stejskal Jaroslav, Kafka Leoš, Kadlec Jiří: PicoBlaze lekce 2: generování VHDL a implementace systému s procesorem PicoBlaze do FPGA v prostředí Xilinx ISE, ÚTIA AV ČR, (Praha 2007) (2007)
  20. Svozil Jiří, Stejskal Jaroslav, Kafka Leoš, Kadlec Jiří: PicoBlaze lekce 3: sériová komunikace RS232 a testování IP jader pomocí procesoru PicoBlaze, ÚTIA AV ČR, (Praha 2007) (2007)
  21. Kadlec Jiří: Preparation ARTEMIS and the Czech republic: current status and related issues , Regional Conference on Embedded and Ambient Systems Book of Abstracts , Eds: Varga Antila K., Kiss Ákos, Marsiske Stefan, Vásárhelyi József, RCEAS 2007 First Regional Conference on Embedded and Ambient Systems, (Budapešť, HU, 22.11.2007-24.11.2007) (2007)
  22. Bartosinski Roman, Kadlec Jiří: Simulation of MCU hardware peripherals , Technical Computing Prague 2007, Technical Computing Prague 2007, (Praha, CZ, 14.11.2007-14.11.2007) (2007)
  23. Kadlec Jiří, Daněk Martin: Design and verification methodology for reconfigurable designs in Atmel FPSLIC , Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 79-80 , Eds: Reorda M. S., Novák O., Straube B., DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems, (Prague, CZ, 18.04.2006-21.04.2006) (2006)
  24. Bartosinski Roman, Kadlec Jiří: Hardware co-simulation with communication server from MATLAB/Simulink , Technical computing Prague 2006. 14th annual conference proceedings, p. 13-20 , Eds: Procházka A., Technical computing Prague 2006 /14./, (Prague, CZ, 26.10.2006) (2006)
  25. Kadlec Jiří, Kadlecová Milada: Přechod ústavů Akademie věd na V.V.I . a jeho dopad na běžící projekty 6.RP EU, (Praha, CZ, 14.11.2006) (2006)
  26. Pohl Zdeněk, Kadlec Jiří: RLS Lattice Demo, ÚTIA AV ČR, (Praha 2006) (2006)
  27. Kadlec Jiří, Kadlecová Milada: Robotics in IST FP7, (Praha, CZ, 07.11.2006) (2006)
  28. Kadlec Jiří: Double Precision Simulation Package double-dk-rel2. (Program), ÚTIA AV ČR, (Praha 2005) (2005)
  29. Kadlec Jiří, Gook R.: Floating point controller as a picoblaze network on a single spartan 3 FPGA , MAPLD 2005 International Conference Proceeding, p. 1-11 , Eds: Katz R. B., MAPLD 2005 International Conference, (Washington, US, 07.09.2005-09.09.2005) (2005)
  30. Daněk Martin, Heřmánek Antonín, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk: GIN - notetaker for blind people: An example of using dynamic reconfiguration of FPGAs , ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 15-18 , Eds: Bosschere K., HiPEAC Network of Excellence, (Ghent 2005) , ACACES 2005., (L'Aquila, IT, 26.07.2005) (2005)
  31. Pohl Zdeněk, Kadlec Jiří, Šůcha P., Hanzálek Z.: Performance tuning of interative algorithms in signal processing , Proseedings of the 2005 International Conference on Field Programmable Logic and Applications. FPL 2005, p. 699-702 , Eds: Rissa T., Wilton S., Leong P., FPL 2005. International Conference on Field Programmable Logic and Applications, (Tampere, FI, 24.08.2005-26.08.2005) (2005)
  32. Kadlec Jiří: Reconfigurable floating point co-processor for atmel FPSLIC , MAPLD 2005 International Conference Proceedings, p. 1-12 , Eds: Katz R. B., MAPLD 2005 International Conference Proceedings, (Washington, US, 07.09.2005-09.09.2005) (2005)
  33. Kadlec Jiří: Scalable Floating Point Simulation Package float-dk-rel2. (Program), ÚTIA AV ČR, (Praha 2005) (2005)
  34. Kadlec Jiří, Kadlecová Milada: Výměna zkušeností řešitelů evropských projektů po 1. kole auditů 6. RPEU, (Praha, CZ, 03.11.2005) (2005)
  35. Kadlec Jiří, Daněk Martin, Honzík Petr: Reconfigurable Scrolling Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2117 (2004)
  36. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk: Reconfigurable system-on-a-programmable-chip platform , Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, p. 21-28, IEEE Workshop on DDECS 2004 /7./, (Stará Lesná, SK, 18.04.2004-21.04.2004) (2004)
  37. Kadlec Jiří, Daněk Martin, Honzík Petr: Reconfigurable 24-Bit Floating-Point Coprocessor Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2116 (2004)
  38. Kadlec Jiří, Kadlecová Milada: Workshop FET. Future and Emerging Technologies in the frame of IST FP6, (Praha, CZ, 14.05.2004) (2004)
  39. Líčko Miroslav, Kadlec Jiří: An Introduction to the Xilinx System Generator. (Program), ÚTIA AV ČR, (Praha 2003) (2003)
  40. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří: Dynamic reconfiguration of Atmel FPGAs , UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-4 , Eds: Hettiaratchi S., University of Southampton, (Southampton 2003) , UK ACM SIGDA Workshop on Electronic Design Automation /3./, (Southampton, GB, 11.09.2003-12.09.2003) (2003)
  41. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří: Dynamic reconfiguration of FPGAs , Recent Trends in Multimedia Information Processing. Proceedings, p. 288-291 , Eds: Šimák B., Zahradník P., Czech Technical University, (Prague 2003) , International Workshop on Systems, Signals and Image Processing /10./, (Praha, CZ, 10.09.2003-11.09.2003) (2003)
  42. Matoušek Rudolf, Daněk Martin, Pohl Zdeněk, Kadlec Jiří: Dynamic runtime partial reconfiguration in FPGA , ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, p. 294-298 , Eds: Nouza J., Drábková J., Technical University, (Liberec 2003) , ECMS 2003 /6./, (Liberec, CZ, 02.06.2003-04.06.2003) (2003)
  43. Matoušek Rudolf, Líčko Miroslav, Kadlec Jiří: European Logarithmic Microprocessor. (Program), ÚTIA AV ČR, (Praha 2003) (2003)
  44. Heřmánek Antonín, Pohl Zdeněk, Kadlec Jiří: FPGA implementation of the adaptive lattice filter , Field-Programmable Logic and Applications. Proceedings of the 13th International Conference, p. 1095-1098 , Eds: Cheung P. Y. K., Constantinides G. A., de Sousa J. D., Springer, (Berlin 2003) Lecture Notes in Computer Science. vol.2778 , Field Programmable Logic and Applications /13./, (Lisabon, PT, 01.09.2003-03.09.2003) (2003)
  45. Pohl Zdeněk, Matoušek Rudolf, Kadlec Jiří, Tichý Milan, Líčko M.: Lattice adaptive filter implementation for FPGA , FPGA 2003 ACM/SIGDA Eleventh ACM International Symposium on Field-Programmable Gate Arrays, p. 246, ACM, (Monterey 2003) , FPGA 2003, (Monterey, US, 23.02.2003-25.02.2003) (2003)
  46. Pohl Zdeněk, Kadlec Jiří, Líčko Miroslav, Matoušek Rudolf, Tichý Milan: Lattice IP Core used in Real-time Lattice Demo on XESS Board. (Program), ÚTIA AV ČR, (Praha 2003) (2003)
  47. Líčko Miroslav, Matulík Radim, Matoušek Rudolf, Kadlec Jiří: Prototyping Board for CAK. (Program), ÚTIA AV ČR, (Praha 2003) (2003)
  48. Pohl Zdeněk, Kadlec Jiří, Tichý Milan: RLS Lattice - Celoxica RC200 Demo. (Program), ÚTIA AV ČR, (Praha 2003) (2003)
  49. Schier Jan, Kadlec Jiří: Using logarithmic arithmetic for FPGA implementation of the Givens rotations , Proceedings of the Sixth Baiona Workshop on Signal Processing in Communications, p. 199-204 , Eds: Mosquera C., Perez-Gonzales F., Universidade de Vigo, (Vigo 2003) , Baiona Workshop on Signal Processing Communications /6./, (Baiona, ES, 08.09.2003-10.09.2003) (2003)
  50. Albu F., Kadlec Jiří, Heřmánek Antonín, Fagan A., Coleman N.: Analysis of the LNS implementation of the fast affline projection algorithms , Proceedings of the Irish Signals and Systems Conference 2002. ISSC 2002, p. 251-255 , Eds: Marnane W., Lightbody G., Pesch D., Institute of Technology, (Cork 2002) , Irish Signals and Systems Conference 2002, (Cork, IE, 25.06.2002-26.06.2002) (2002)
  51. Smith B., Edin M., Hillerová E., Kadlecová Milada, Heřmánková Dana, Kadlec Jiří: e-2002 e-Work & e-Business Conference, ( 2002) , (Praha, CZ, 16.10.2002-18.10.2002) (2002)
  52. Grabowiecki T., Kadlec Jiří, Čerans K., Pihl T., Weber B., Zergoi T.: Ideal-ist Conference Information Society Technology in the 6th Framework Programme, ( 2002) , (Varšava, PL, 25.11.2002-26.11.2002) (2002)
  53. Matoušek R., Pohl Z., Kadlec Jiří, Tichý Milan, Heřmánek Antonín: Logarithmic arithmetic core based RLS LATTICE implementation , Design, Automation and Test in Europe DATE 02, p. 271 , Eds: Sciuto D., Kloos C. D., IEEE, (Los Alamitos 2002) , Design, Automation and Test in Europe DATE 02, (Paris, FR, 04.03.2002-08.03.2002) (2002)
  54. Líčko Miroslav, Schier Jan, Pohl Zdeněk, Kadlec Jiří, Tichý Milan, Matoušek Rudolf, Heřmánek Antonín: Logarithmic Arithmetic for Real Data Types and Support for MATLAB/SIMULINK Based Rapid-FPGA-Prototyping, ÚTIA AV ČR, (Praha 2002) Research Report 2069 (2002)
  55. Matoušek Rudolf, Tichý Milan, Pohl Zdeněk, Kadlec Jiří, Softley C.: Logarithmic number system and floating-point arithmetics on FPGA , Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream, p. 627-636 , Eds: Glesner M., Zipf P., Renovell M., Springer, (Berlin 2002) Lecture Notes in Computer Science. vol.2438 , International Conference FPL 2002 /12./, (Montpellier, FR, 02.09.2002-04.09.2002) (2002)
  56. Kadlec Jiří, Tichý Milan, Heřmánek Antonín, Pohl Z., Líčko M.: Matlab Toolbox for high-level bit-exact emulation of HandelC VHDL FPGA designs , Design, Automation and Test in Europe DATE˙02, p. 264 , Eds: Sciuto D., Kloos C. D., IEEE, (Los Alamitos 2002) , Design, Automation and Test in Europe DATE˙02, (Paris, FR, 04.03.2002-08.03.2002) (2002)
  57. Albu F., Kadlec Jiří, Coleman N., Fagan A.: Pipelined implementations of the A Priory Error-Feedback LSL algorithm using logarithmic arithmetic , Proceedings of the IEEE International Conference on Acoustics, Speech and Signal Processing, p. 2681-2684, IEEE, (Orlando 2002) , ICASSP 2002, (Orlando, US, 13.05.2002-17.05.2002) (2002)
  58. Albu F., Kadlec Jiří, Coleman N., Fagan A.: The Gauss-Seidel Fast Affine Projection algorithm , IEEE Workshop on Signal Processing Systems. Proceedings, p. 109-114 , Eds: Parhi K., Shanbhag N., IEEE, (San Diego 2002) , SIPS 2002, (San Diego, US, 16.10.2002-18.10.2002) (2002)
  59. Albu F., Kadlec Jiří, Matoušek Rudolf, Heřmánek Antonín, Coleman J. N.: A Comparison of FPGA Implementation of the A Priori Error-Feedback LSL Algorithm using Logarithmic Arithmetic, ÚTIA AV ČR, (Praha 2001) Research Report 2035 (2001)
  60. Coleman J. N., Chester E. I., Softley Ch., Kadlec Jiří: Arithmetic on the European Logarithmic Microprocessor, ÚTIA AV ČR, (Praha 2001) Research Report 2012 (2001)
  61. Kadlec Jiří, Coleman J. N.: Extended Precision LNS Arithmetic, ÚTIA AV ČR, (Praha 2001) Research Report 2008 (2001)
  62. Coleman J. N., Kadlec Jiří: Extended Precision Logarithmic Arithmetic , Signal Systems and Computers 2000, 34th Asilomar Conference on Signal Systems and Computers. Proceedings, p. 124-129, IEEE Signal Processing Society, (Monterey 2001) , Asilomar conference on Signal Systems and Computers /34./, (Monterey, US, 07.11.2000) (2001)
  63. Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav: FPGA implementation of logarithmic unit core , Embedded Intelligence 2001, p. 547-554, Design & Elektronik, (Nürnberg 2001) , Embedded Intelligence 2001, (Nürnberg, DE, 14.02.2001-16.02.2001) (2001)
  64. Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav: FPGA Implementation of Logarithmic Unit Core, ÚTIA AV ČR, (Praha 2001) Research Report 2007 (2001)
  65. Kadlec Jiří, Kadlecová Milada, Pleger R., Grabowiecki T., Zergoi T., Krekels D.: Ideal-ist Workshop European IT Research Programme (IST) Successful Proposal Writing, ( 2001) , (Praha, CZ, 26.09.2001) (2001)
  66. Pleger R., Kadlec Jiří, Grabowiecki T., Kadlecová Milada, Krekels D., Heřmánek Antonín: Ideal-ist Workshop European IT Research Programme (IST) Successful Proposal Writing, ( 2001) , (Dresden, DE, 17.09.2001) (2001)
  67. Albu F., Kadlec Jiří, Fagan A., Coleman J. N.: Implementation of Error-Feedback RLS Lattice on Virtex using logarithmic arithmetic , Advances in Systems Science: Measurement, Circuits and Control. Proceedings, p. 517-521 , Eds: Mastorakis N. E., Pecorelli-Peres L. A., WSES Press, (Rethymno 2001) , WSES Multiconference on Circuits, Systems, Communications & Computers. CSCC 2001 /5./, (Kréta, GR, 08.07.2001-15.07.2001) (2001)
  68. Albu F., Kadlec Jiří, Softley Ch., Matoušek Rudolf, Heřmánek Antonín: Implementation of Normalized RLS Lattice on Virtex, ÚTIA AV ČR, (Praha 2001) Research Report 2040 (2001)
  69. Albu F., Kadlec Jiří, Softley Ch., Matoušek Rudolf, Heřmánek Antonín, Coleman J. N., Fagan A.: Implementation of (Normalised) RLS Lattice on Virtex , Field-Programmable Logic and Applications. Proceedings, p. 91-100 , Eds: Brebner G., Woods R., Springer, (Berlin 2001) Lecture Notes in Computer Science. vol.2147 , International Conference FPL 2001, (Belfast, IE, 27.08.2001-29.08.2001) (2001)
  70. Schier Jan, Kadlec Jiří, Moonen M.: Implementing Advanced Equalization Algorithms using Simulink with Embedded Alpha AXP Coprocessor, ÚTIA AV ČR, (Praha 2001) Research Report 2013 (2001)
  71. Kadlec Jiří, Matoušek Rudolf, Heřmánek Antonín, Líčko Miroslav, Softley Ch.: Logarithmic ALU 32-bit for Handel C 2.1 and Celoxica DK1 , Celoxica User Conference. Proceedings, Celoxica, (Abington 2001) , Celoxica User Conference /1./, (Stratford, GB, 02.04.2001-04.04.2001) (2001) Download
  72. Kadlec Jiří, Heřmánková Dana, Trojanowski K., Drath P., Schoefield M., Burak R.: Managing EC Research Project - Workshop and Brokerage, ( 2001) , (Praha, CZ, 11.12.2001) (2001)
  73. Kadlec Jiří, Heřmánková Dana, Rektorová Alice, Drath P., Schoefield M., Martynovicz P.: Opportunities in the European Union's IST Programme, ( 2001) , (Praha, CZ, 13.11.2001-14.11.2001) (2001)
  74. Heřmánek Antonín, Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav, Pohl Zdeněk: Pipelined logarithmic 32bit ALU for Celoxica DK1 , Sborník příspěvků 9.ročníku konference MATLAB 2001, p. 72-80 , Eds: Procházka A., Uhlíř J., VŠCHT, (Praha 2001) , MATLAB 2001 /9./, (Praha, CZ, 11.10.2001) (2001)
  75. Heřmánek Antonín, Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav, Softley Ch.: Pipelined Logarithmic 32bit ALU for Celoxica DK1, ÚTIA AV ČR, (Praha 2001) Research Report 2034 (2001)
  76. Kadlec Jiří: Review and Classification of RLS Array Algorithms for LNS Arithmetics, ÚTIA AV ČR, (Praha 2001) Research Report 2006 (2001)
  77. Kadlec Jiří, Albu F., Softley Ch., Matoušek Rudolf, Heřmánek Antonín: RLS Lattice for Virtex FPGA using 32-bit and 20-bit Logarithmic Arithmetic, ÚTIA AV ČR, (Praha 2001) Research Report 2036 (2001)
  78. Kadlec Jiří: Structure estimation for systems described by radial basis functions based on normalized QR filtering , Preprints of the 1st IFAC/IEEE Symposium on System Structure and Control, IFAC, (Prague 2001) , IFAC/IEEE Symposium on System Structure and Control /1./, (Prague, CZ, 29.08.2001-31.08.2001) (2001)
  79. Coleman J. N., Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk, Heřmánek Antonín: The European Logarithmic Microprocessor - a QRD RLS Applications, ÚTIA AV ČR, (Praha 2001) Research Report 2038 (2001)
  80. Kadlec Jiří, Heřmánek Antonín, Softley Ch., Matoušek Rudolf, Líčko Miroslav: 32-bit Logarithmic ALU for Handel-C 2.1 and Celoxica DK1, ÚTIA AV ČR, (Praha 2001) Research Report 2037 (2001)
  81. Heřmánek Antonín, Matoušek Rudolf, Líčko Miroslav, Kadlec Jiří: FPGA implementation of logarithmic unit , Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 84-90, VŠCHT, (Praha 2000) , MATLAB 2000 /8./, (Praha, CZ, 01.11.2000) (2000)
  82. Schier Jan, Kadlec Jiří, Moonen M.: Implementing advanced equalization algorithms using Simulink with embedded Alpha AXP coprocessor , Fifth IMA International Conference on Mathematics in Signal Processing, p. 11-14, University of Warwick, (Warwick 2000) , Mathematics in Signal Processing /5./, (Warwick, GB, 18.12.2000-20.12.2000) (2000)
  83. Ondračka J., Oravec R., Kadlec Jiří, Cocherová E.: Simulation of RLS and LMS algorithms for adaptive noise cancellation in MATLAB , Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 301-305, VŠCHT, (Praha 2000) , MATLAB 2000 /8./, (Praha, CZ, 01.11.2000) (2000)
  84. Hlavička J., Kadlec Jiří: Vstup českých institucí do evropské informační společnosti , Česko-slovenská konference RUFIS 2000, p. 27-32, VUT, (Brno 2000) , Česko-slovenská konference RUFIS 2000., (Brno, CZ, 05.09.2000-06.09.2000) (2000)
  85. Tesař Ludvík, Berec Luděk, Dolanc G., Szederkényi G., Kadlec Jiří: A toolbox for model-based fault detection and isolation , European Control Conference. ECC '99, VDI/VDE GMA, (Karlsruhe 1999) , European Control Conference. ECC '99, (Karlsruhe, DE, 31.08.1999-03.09.1999) (1999) Download
  86. Kadlec Jiří, Barbier A., de Castellane L., Gautier L.-P., Gourguechon S., Leroy S., Paturle A.: Generation of Simulink S-functions, ÚTIA AV ČR, (Praha 1999) Research Report 1975 (1999)
  87. Hillerová E., Kadlec Jiří: Informační den k programu IST, Technologické centrum AV ČR, (Praha 1999) , Seminář k programu IST /5./, (Praha, CZ, 23.09.1999) (1999)
  88. Hillerová E., Kadlec Jiří: Konference k zahájení 5. rámcového programu Evropské unie, MŠMT, (Praha 1999) , Konference 5. rámcového programu Evropské unie /5./, (Praha, CZ, 05.02.1999) (1999)
  89. Kadlec Jiří, Matoušek Rudolf, Vialatte Christian, Coleman J. N.: Port of Pascal FPGA-logarithmic-unit simulator to Simulink/RTW , Sborník příspěvků 7. ročníku konference MATLAB '99, p. 84-90, VŠCHT, (Praha 1999) , MATLAB '99 /7./, (Praha, CZ, 03.11.1999) (1999)
  90. Vialatte Christian, Kadlec Jiří: RTW support for low cost C31 board , Sborník příspěvků 7. ročníku konference MATLAB '99, p. 231-237, VŠCHT, (Praha 1999) , MATLAB '99 /7./, (Praha, CZ, 03.11.1999) (1999)
  91. Vialatte Christian, Kadlec Jiří: RTW support for parallel 64-bit Alpha AXP-based platforms , Sborník příspěvků 7. ročníku konference MATLAB '99, p. 238-244, VŠCHT, (Praha 1999) , MATLAB '99 /7./, (Praha, CZ, 03.11.1999) (1999)
  92. Kadlec Jiří: Acceleration of computation-intensive algorithms on parallel Alpha AXP processors , Preprints of the 3rd European IEEE Workshop on Computer-Intensive Methods in Control and Data Processing, p. 89-98 , Eds: Rojíček J., Valečková M., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1998) , CMP'98 /3./, (Praha, CZ, 07.09.1998-09.09.1998) (1998) Download
  93. Kadlec Jiří, Schier Jan: HSLA DSP Package, ÚTIA AV ČR, (Praha 1998) Research Report 1924 (1998) Download
  94. Kadlec Jiří, Schier Jan: HSLA 3D Monitor Package, ÚTIA AV ČR, (Praha 1998) Research Report 1925 (1998) Download
  95. Kadlec Jiří, Schier Jan: Numerical Analysis of a Normalized QR Filter Using Probability Description of Propagated Data, ÚTIA AV ČR, (Praha 1998) Research Report 1923 (1998) Download
  96. Kárný Miroslav, Kadlec Jiří, Sutanto E. L.: Quasi-Bayes estimation applied to normal mixture , Preprints of the 3rd European IEEE Workshop on Computer-Intensive Methods in Control and Data Processing, p. 77-82 , Eds: Rojíček J., Valečková M., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1998) , CMP '98 /3./, (Praha, CZ, 07.09.1998-09.09.1998) (1998) Download
  97. Kadlec Jiří, Schier Jan: Rapid prototyping of adaptive control algorithms on parallel multiprocessors , Signal Processing Symposium, p. 115-118, IEEE, (Leuven 1998) , SPS '98, (Leuven, BE, 26.03.1998-27.03.1998) (1998) Download
  98. Kadlec Jiří, Schier Jan: Results of the Global Probability Analysis Approach, ÚTIA AV ČR, (Praha 1998) Research Report 1926 (1998) Download
  99. Schier Jan, Kadlec Jiří, Böhm Josef: Robust adaptive controller with fine grain parallelism , Preprints of the IFAC Workshop on Adaptive Systems in Control and Signal Processing, p. 436-441, IFAC, (Glasgow 1998) , Adaptive Systems in Control and Signal Processing, (Glasgow, GB, 26.08.1998-28.08.1998) (1998) Download
  100. Kadlec Jiří: Parallel processing on Alphas under MATLAB 5 , SOFSEM '97: Theory and Practice of Informatics, p. 440-448 , Eds: Plášil F., Jeffery K. G., Springer, (Berlin 1997) Lecture Notes in Computer Science. vol.1338 , Seminar on Current Trends in Theory and Practice of Informatics /24./, (Milovy, CZ, 22.11.1997-29.11.1997) (1997)
  101. Kadlec Jiří: Para-Mat parallel processing under MATLAB , Simulationstechnik. Tagungsband, p. 684-687 , Eds: Kuhn A., Wenzel S., Vieweg, (Braunschweig 1997) ASIM vol.11 , Simulationstechnik. /11./, (Dortmund, DE, 11.11.1997-14.11.1997) (1997)
  102. Kadlec Jiří: Rapid prototyping and parallel processing under MATLAB 5 , Tagungsband. 3. Zittauer Workshop Magnetlagertechnik, p. 101-104 , Eds: Hampel R., Worlitz F., IPM, (Zittau 1997) Wissenschftliche Berichte. vol.51 , Zittauer Workshop Magnetlagertechnik /3./, (Zittau, DE, 11.09.1997-12.09.1997) (1997) Download
  103. Kadlec Jiří, Vialatte Ch.: Rapid prototyping and parallel processing under MATLAB 5 , MATLAB Conference 1997, p. 120-125, Kimhua Technology, (Seoul 1997) , MATLAB Conference '97, (Seoul, KR, 13.10.1997-14.10.1997) (1997)
  104. Nedoma Petr, Kadlec Jiří: Extension of MATLAB parallel accelerator , Computer-Intensive Methods in Control and Signal Processing. Preprints of the 2nd European IEEE Workshop CMP'96, p. 155-160 , Eds: Berec L., Rojíček J., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1996) , European IEEE Workshop CMP'96 /2./, (Prague, CZ, 28.08.1996-30.08.1996) (1996)
  105. Kadlec Jiří, Nakhaee N.: Alpha Bridge - high performance computing with MATLAB , Industrial Applications of MATLAB and Simulink for the Analysis of Electro- and Hydro- Mechanical Systems. Preprints, p. 11-16, Matlab UG, (Birmingham 1995) , Special Interest Meeting: Industrial Applications /1./, (Birmingham, GB, 20.09.1995) (1995) Download
  106. Kadlec Jiří, Nakhaee N.: Alpha-Bridge for MATLAB 4 , Transputer Applications and Systems '95. Proceedings, p. 175-189 , Eds: Cook B. M., Nixon P., IOS Press, (Harrogate 1995) , World Transputer Congress '95, (Harrogate, GB, 04.09.1995-06.09.1995) (1995)
  107. Kadlec Jiří, Gaston F. M. F.: Identification with directional parameter tracking for high-performance fixed-point implementations , The Sixth Irish DSP and Control Colloquium, p. 215-222 , Eds: Gaston F., Dodds G., Techman, (Belfast 1995) , IDSPCC '95 /6./, (Belfast, IE, 19.06.1995-20.06.1995) (1995) Download
  108. McWhirter J. G., Walke R. L., Kadlec Jiří: Normalised Givens rotations for recursive least squares processing , VLSI Signal Processing, VIII, p. 313-322 , Eds: Nishitani T., Parhi K., IEEE, (New York 1995) , IEEE Workshop on VLSI Signal Processing /8./, (Sakai, JP, 16.10.1995-18.10.1995) (1995)
  109. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: The block regularised parameter estimator and its parallelisation , Identification and Optimization, Oriented for Use in Adaptive Control. Preprints, p. 107-120 , Eds: Böhm J., Rojíček J., ÚTIA AV ČR, (Praha 1995) , Summer School Course, (Prague, CZ, 17.07.1995-18.07.1995) (1995)
  110. Kadlec Jiří: [Recenze] , Automatica vol.31, 10 (1995), p. 1519-1521 (1995)
  111. Kadlec Jiří: Direct software bridge MATLAB-transputer boards , Signal Processing Conference. Proceedings, p. 1601-1604 , Eds: Covan C. F. N., EUSIPCO, (Edinburgh 1994) , EUSIPCO '94. European Signal Processing Conference /7./, (Edinburgh, GB, 13.09.1994-16.09.1994) (1994)
  112. Kadlec Jiří: Direct Software Bridge MATLAB-Transputer Boards, ÚTIA AV ČR, (Praha 1994) Research Report 1819 (1994)
  113. Kadlec Jiří: Lattice feedback regularised identification , 10th IFAC Symposium on System Identification. Preprints, p. 277-282 , Eds: Blanke M., Söderström T., IFAC, (Copenhagen 1994) , IFAC SYSID '94 /10./, (Copenhagen, DK, 04.07.1994-06.07.1994) (1994)
  114. Kadlec Jiří: Lattice Feedback Regularised Identification, ÚTIA AV ČR, (Praha 1994) Research Report 1788 (1994)
  115. Kadlec Jiří: Matlab transputer bridge. Abstract , 10th IFAC Symposium on System Identification. Preprints, p. 31 , Eds: Blanke M., Söderström T., IFAC, (Copenhagen 1994) , IFAC SYSID '94 /10./, (Copenhagen, DK, 04.07.1994-06.07.1994) (1994)
  116. Kadlec Jiří: Numerical Analysis of a Normalized RLS Filter Using a Probability Description of Propagated Data, ÚTIA AV ČR, (Praha 1994) Research Report 1818 (1994)
  117. Kadlec Jiří: Numerical analysis of normalized RGS filter by probability description of propagated data. Abstract , Algorithms and Parallel VLSI Architectures. Abstracts, p. -, Katholieke Universiteit, (Leuven 1994) , International Workshop on Algorithms and Parallel VLSI Architectures /3./, (Leuven, BE, 29.08.1994-31.08.1994) (1994)
  118. Kadlec Jiří: Numerical analysis of normalized RLS filter using a probability description of propagated data , Algorithms and Parallel VLSI Architectures III, p. 61-72 , Eds: Moonen M., Catthor F., Elsevier, (Amsterdam 1994) , Algorithms and Parallel VLSI Architectures /3./, (Leuven, BE, 29.08.1994-31.08.1994) (1994)
  119. Kadlec Jiří: Parallel Normalized Identification Algorithm with Lattice Feedback Regularization, ÚTIA AV ČR, (Praha 1994) Research Report 1820 (1994)
  120. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: Regularised Lattice-Ladder Adaptive Filter, ÚTIA AV ČR, (Praha 1994) Research Report 1793 (1994)
  121. Kadlec Jiří: Structure Determination and Tracking for Parallel Radial Basic Function Based Nonlinear Networks, ÚTIA AV ČR, (Praha 1994) Research Report 1790 (1994)
  122. Kadlec Jiří: Systolic arrays for identification of systems with variable structure , Computer-Intensive Methods in Control and Signal Processing, p. 123-132 , Eds: Kulhavá L., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1994) , IEEE Workshop CMP '94, (Praha, CZ, 07.09.1994-09.09.1994) (1994)
  123. Kadlec Jiří: Systolic Arrays for Identification of Systems with Variable Structure, ÚTIA AV ČR, (Praha 1994) Research Report 1817 (1994)
  124. Gaston F. M. F., Kadlec Jiří, Schier Jan: The Block Regularised Linear Quadratic Optimal Controller, ÚTIA AV ČR, (Praha 1994) Research Report 1789 (1994)
  125. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: The Block Regularised Parameter Estimator and Its Parallel Implementation, ÚTIA AV ČR, (Praha 1994) Research Report 1787 (1994)
  126. Gaston F. M. F., Kadlec Jiří, Schier Jan: The block regularized linear quadratic optimal controller , IEE International Conference on Control '94, p. 1254-1259, IEE, (London 1994) IEE. vol.389 , CONTROL '94, (Warwick, GB, 21.03.1994-24.03.1994) (1994) Download
  127. Kadlec Jiří: The Cell-Level Description of Systolic Block Regularised QR Filter., ÚTIA AV ČR, (Praha 1994) Research Report 1792 (1994)
  128. Kadlec Jiří: Transputer Implementation of Block Regularised Filtering, ÚTIA AV ČR, (Praha 1994) Research Report 1791 (1994)
  129. Kadlec Jiří: [Recenze] , Automatica vol.30, 5 (1994), p. 917-918 (1994)
  130. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: A Nonlinear Systolic Filter with Radial Basis Function Estimation , Neural Computing Research and Applications, p. 183-190 , Eds: Hilger A., IOP Publ., (London 1993) , Neural Computing Research and Applications, (Belfast, GB, 25.06.1992-26.06.1992) (1993)
  131. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: Parallel Implementation of Restricted Parameter Tracking, Queen's University, (Belfast 1993) Research Report 1/2 (1993)
  132. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: Regularised Lattice-Ladder Adaptive Filter , Mutual Impact of Computing Power and Control Theory, p. 245-257 , Eds: Kárný M., Warwick K., Plenum Press, (New York 1993) , IFAC Workshop on the Mutual Impact of Computing Power and Control Theory, (Prague, CZ, 01.09.1992-02.09.1992) (1993)
  133. Kadlec Jiří: Structure Determination and Tracking for Parallel Radial Basis Function Based Nonlinear Networks , Innovative Approaches to Modelling and Optimal Control of Large Scale Pipeline Networks, p. 75-84 , Eds: Králik J., ÚTIA AV ČR, (Prague 1993) , International Workshop SIMONE /2./, (Prague, CZ, 27.09.1993-30.09.1993) (1993)
  134. Kadlec Jiří: The Cell Level Description of Systolic Block Regularised QR Filter , VLSI Signal Processing, p. 298-306 , Eds: Eggermont L. D. J., Dewilde P., IEEE, (New York 1993) , VLSI Signal Processing, (Veldhoven, NL, 20.10.1993-22.10.1993) (1993)
  135. Kadlec Jiří: The Lattice-Ladder with Generalized Forgetting , Linear Algebra for Large Scale and Real-Time Applications, p. 397-398 , Eds: Moonen M. S., Golub G. H., De Moor B. L. R., Kluwer Academic, (Leuven 1993) NATO ASI Series. Series E: Applied Sciences. vol.232 , Proceedings of the NATO Advanced Study Institute on Linear Algebra for Large Scale and Real-Time Applications, (Leuven, BE, 03.08.1992-14.08.1992) (1993)
  136. Kadlec Jiří: Transputer Implementation of Block Regularised Filtering , Progress in Transputer Computing Technology, p. 1-15 , Eds: Kulhavá L., Schier J., Kárný M., ÚTIA AV ČR, (Prague 1993) , International Workshop TCT '93, (Prague, CZ, 04.05.1993-05.05.1993) (1993)
  137. Kadlec Jiří: A Joint Criterion for Exponential Directional and Mixed Parameter Tracking , 4th IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92, p. 687-692 , Eds: Landau I. D., Dugard L., M'Saad M., Laboratoire d'Automatique, (Grenoble 1992) , IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92 /4./, (Grenoble, FR, 01.07.1992-03.07.1992) (1992)
  138. Kadlec Jiří: Fast Ladder-Lattice Identification Architecture with Numerically Robust Tracking of Parameters , Algorithms and Architectures for Real-Time Control, p. 105-111 , Eds: Fleming P. O., Jones D. I., Pergamon Press, (Oxford 1992) IFAC Workshop Series. vol.4 , IFAC Workshop on Algorithms and Architectures for Real-Time Control, (Bangor, GB, 11.09.1991-13.09.1991) (1992)
  139. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: Parallel Implementation of Restricted Parameter Tracking , Mathematics in Signal Processing, p. 86-88, University of Warwick, (SouthendonSea 1992) , IMA Conference on Mathematics in Signal Processing /3./, (Warwick, GB, 15.12.1992-17.12.1992) (1992)
  140. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: Regularised Lattice-Ladder Adaptive Filter , IFAC Workshop on Mutual Impact of Computing Power and Control Theory. MICC '92, p. 143-150 , Eds: Kárný M., Warwick K., ÚTIA ČSAV, (Prague 1992) , IFAC Workshop on Mutual Impact of Computing Power and Control Theory. MICC '92, (Praha, CS, 01.09.1992-02.09.1992) (1992)
  141. Kadlec Jiří, Gaston F. M. F., Irwin G. W.: Systolic Implementation of the Regularized Parameter Estimator , VLSI Signal Processing 6, p. 520-529 , Eds: Yao K., Jain R., Przytula W., Rabaey J., IEEE, (New York 1992) , Workshop on VLSI Signal Processing, (Napa, US, 28.10.1992-30.10.1992) (1992)
  142. Nedoma Petr, Kadlec Jiří, Schier Jan: Tools for Implementation of Parallel Algorithms for Adaptive Control and Signal Processing , 4th IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92, p. 727-730 , Eds: Landau I. D., Dugard L., M'Saad M., Laboratoire d'Automatique, (Grenoble 1992) , IFAC International Symposium on Adaptive Systems in Control and Signal Processing. ACASP '92 /4./, (Grenoble, FR, 01.07.1992-03.07.1992) (1992)
  143. Kadlec Jiří: Unified Design of Fast Array Estimators, Queen's University, (Belfast 1992) Research Report 1/6 (1992)
  144. Kadlec Jiří: A Recursive Modified Gram-Schmidt Identification with Directional Tracking of Parameters , Preprints of the 9th IFAC/IFORS Symposium on Identification and System Parameter Estimation, p. 1707-1712, AKA PRINT Nyomdaipari, (Budapest 1991) , IFAC/IFORS Symposium on Identification and System Parameter Estimation /9./, (Budapest, HU, 08.07.1991-12.07.1991) (1991)
  145. Kadlec Jiří: Fast and Adaptive Identification Algorithms Suitable for Neural Network Applications , Neural Nets for System Applications, p. -, IEE/ÚTIA, (Prague 1991) , Neural Nets for System Applications, (Prague, CS, 20.05.1990-21.05.1990) (1991)
  146. Kadlec Jiří: Identification Algorithms for Parallel Computing Networks with Fixed Point Arithmetic , Neural Nets for System Applications, p. -, IEE/ÚTIA, (Prague 1991) , Neural Nets for System Applications, (Prague, CS, 20.05.1990-21.05.1990) (1991)
  147. Kadlec Jiří: Neural Nets for System Applications, IEE/ÚTIA, (Praha 1991) , Neural Nets for System Applications, (Prague, CS, 20.05.1990-21.05.1990) (1991)
  148. Kadlec Jiří, Matulík Radim: Terminály pro zrakově postižené, ÚTIA ČSAV, (Praha 1990) Research Report 1691 (1990)
  149. Kadlec Jiří, Krampe G.: Bayesian Analysis of System Parameter Variations, Based on Testing of Hypotheses about Forgetting Factors, RuhrUniversität, (Bochum 1989) Research Report (1989)
  150. Kadlec Jiří, Stammen P.: Bayesian Recursive Identification of Large Scale Interconnected Stochastic Time Variable Systems, Based on Testing of Hypotheses about Regreession Models, RuhrUniversität, (Bochum 1989) Research Report (1989)
  151. Kadlec Jiří: Research and Development of Fast Numerically Stable Algorithms for Recursive Identification of Stochastic Systems and their Fixed Point Implementations, RuhrUniversität, (Bochum 1989) Research Report (1989)
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