Institute of Information Theory and Automation

Bibliography

Martin Daněk

    Journal articles

    1. Matoušek Rudolf, Daněk Martin, Kubátová H.: Perspektivy dynamické rekonfigurace programovatelných polí FPGA , Sdělovací technika vol.54, 4 (2006), p. 3-6 (2006)
    2. Daněk Martin, Honzík Petr, Kadlec Jiří, Pohl Zdeněk, Matoušek Rudolf: Platforma s částečnou dynamickou rekonfigurací FPGA , Automa vol.12, 5 (2006), p. 40-43 (2006)
    3. Daněk Martin: Programovatelná hradlová pole - FPGA , Automa vol.12, 2 (2006), p. 9-13 (2006)
    4. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk: Reconfigurable system on programmable chip platform , ATMEL Applications Journal, p. 9-12 (2005)
    5. Matoušek Rudolf, Daněk Martin, Pohl Zdeněk, Bartosinski Roman, Honzík Petr: Reconfigurable System-on-a-Chip , Syndicated vol.5, 2 (2005), p. 1-3 (2005)

    Other publications

    1. Daněk Martin, Kadlec Jiří, Nelson B.: Proceedings 19th International Conference on Field Programmable Logic and Applications (FPL), ÚTIA AV ČR, (Praha 2009) , FPL 2009 19th International Conference on Field Programmable Logic and Applications, (Praha, CZ, 31.08.2009-02.09.2009) (2009)
    2. Daněk Martin, Kadlec Jiří, Bartosinski Roman, Kohout Lukáš: Increasing the Level of Abstraction in FPGA-based Designes , International Conference on Field Programmable Logic and Applications , Eds: Kebschull Udo, International Conference on Field Programmable Logic and Applications, (Heidelberg, DE, 08.09.2008-10.09.2008) (2008) Download
    3. Kafka Leoš, Daněk Martin: Nástroj pro přípravu emulace časově anotovaného netlistu, ( 2008) (2008)
    4. Kadlec Jiří, Daněk Martin, Kohout Lukáš: Proposed architecture of configurable, adaptable SoC , The IET Irish Signals and Systems Conference ISSC 2008 , Eds: Morgan Fearghal, Glavin Martin, Jones Edward, The Institution of Engineering and Technology Irish Signals and Systems Conference, ISSC 2008, (Galway, IE, 18.06.2008-19.06.2008) (2008)
    5. Kafka Leoš, Daněk Martin: RETAC demo – emulátor poruch v2.0, ( 2008) (2008)
    6. Daněk Martin, Philippe J.-M., Bartosinski Roman, Honzík Petr, Gamrat Ch.: Self-Adaptive Networked Entities for Building Pervasive Computing Aschitectures , International Conference on Evolvable Systems: From Biology to Harware, 8th International Conference, ICES 2008 , Eds: Hornby Gregory S., Sekanina Lukáš, Haddow Pauline C., International Conference on Evolvable Systems: From Biology to Harware, 8th International Conference, ICES 2008, (Praha, CZ, 22.09.2008-24.09.2008) (2008) Download
    7. Kadlec Jiří, Kadlecová Milada, Daněk Martin: Workshop on Embedded Systems Education and Training, (Athény, GR, 05.06.2008) (2008)
    8. Kafka Leoš, Daněk Martin, Novák O.: A Novel Emulation Technique that Preserves Circuit Structure and Timing , International Symposium on System-on-Chip 2007 Proceedings , Eds: Nurmi J., Takala J., Vainio O., International Symposium on System-on-Chip 2007 /9./, (Tampere, FI, 20.11.2007-21.11.2007) (2007)
    9. Kadlec Jiří, Bartosinski Roman, Daněk Martin: Accelerating MicroBlaze Floating Point Operations , Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL) , Eds: Bertels Koen, Najjar Walid, Genderen Arjan, Vassiliadis Stamatis, International Conference on Field Programmable Logic and Applications. FPL 2007, (Amsterdam, NL, 27.08.2007-29.08.2007) (2007)
    10. Kafka Leoš, Bartosinski Roman, Daněk Martin: Accessory Tools for Partial Dynamic Reconfiguration on Xilinx FPGAs, ÚTIA AV ČR, (Praha 2007) (2007)
    11. Kafka Leoš, Daněk Martin: Development Kit for PicoBlaze Processor in FITkit Board, ÚTIA AV ČR, (Praha 2007) (2007)
    12. Pohl Zdeněk, Daněk Martin: Flash Formatter, ÚTIA AV ČR, (Praha 2007) (2007)
    13. Kadlec Jiří, Daněk Martin, Schier Jan, Kohout Lukáš, Kafka Leoš, Kloub Jan, Stejskal Jaroslav, Svozil Jiří: Identifikace limitací dosavadních technologií v kontextu projektu VLAM, ÚTIA AV ČR, (Praha 2007) Research Report 2183 (2007)
    14. Bartosinski Roman, Daněk Martin, Honzík Petr, Kadlec Jiří: Modelling Self-Adaptive Networked Entities in Matlab/Simulink , Technical Computing Prague 2007, Technical Computing Prague 2007, (Praha, CZ, 14.11.2007-14.11.2007) (2007)
    15. Kafka Leoš, Daněk Martin, Novák O.: Preservation of Circuit Structure and Timing during Fault Emulation in FPGA , IP 07 IP Based Electronic System Conference & Exhibition Proceedings , Eds: Saucier Gabriele, Nguyen Huy-Nam, IP 07 IP Based Electronic System Conference & Exhibition, (Grenoble, FR, 05.12.2007-06.12.2007) (2007)
    16. Kadlec Jiří, Daněk Martin: Design and verification methodology for reconfigurable designs in Atmel FPSLIC , Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 79-80 , Eds: Reorda M. S., Novák O., Straube B., DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems, (Prague, CZ, 18.04.2006-21.04.2006) (2006)
    17. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf: Dynamic reconfiguration in FPGA-based SoC designs , Proceedings of the 8th IEEE Workshop on Designs and Diagnostics of Electronic Circuits nad Systems, p. 129-136 , Eds: Takách G., Hlawiczka A., Sziraj J., University of West Hungary, (Sopron 2005) , IEEE Design and Diagnostics of Electronic Circuits nad Systems Workshop (DDECS 2005) /8./, (Sopron, HU, 13.04.2005-16.04.2005) (2005)
    18. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf: Dynamic reconfiguration in FPGA-based SoC designs , ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 35-38 , Eds: Bosschere K., HiPEAC Network of Excellence, (Ghent 2005) , ACACES 2005., (L'Aquila, IT, 26.07.2005) (2005)
    19. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf: Dynamic reconfiguration in FPGA-based SoC designs. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, p. 274 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) (2005)
    20. Daněk Martin, Pohl Zdeněk, Nasi K., Karoubalis T.: Figaro - an automatic tool flow for designs with dynamic reconfiguration , Proceedings of the 2005 International Conference on Field Programmable Logic and Applications. FPL 2005, p. 590-593 , Eds: Rissa T., Wilton S., Leong P., FPL 2005. International Conference on Field Programmable Logic and Applications, (Tampere, FI, 22.08.2006-26.08.2005) (2005)
    21. Nasi K., Daněk Martin, Karoubalis T., Pohl Zdeněk: Figaro: An automatic tool flow for designs with dynamic reconfiguration. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, p. 262 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) (2005)
    22. Daněk Martin, Heřmánek Antonín, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk: GIN - notetaker for blind people: An example of using dynamic reconfiguration of FPGAs , ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 15-18 , Eds: Bosschere K., HiPEAC Network of Excellence, (Ghent 2005) , ACACES 2005., (L'Aquila, IT, 26.07.2005) (2005)
    23. Kafka Leoš, Daněk Martin: RETAC Application Notes 2005, ÚTIA AV ČR, (Praha 2005) (2005)
    24. Daněk Martin, Matoušek Rudolf: FLASH Formatter for the FLASH Expansion Board, ÚTIA AV ČR, (Praha 2004) Research Report 2112 (2004)
    25. Daněk Martin, Matoušek Radomil: FLASH Read Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2114 (2004)
    26. Daněk Martin, Kolář J.: FPGA modelling for high-performance algorithms. Abstract , FPGA 2004 ACM/SIGDA Twelfth International Symposium on Field-Programmable Gate Arrays, p. 251, FPGA 2004 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays /12./, (Monterey, US, 22.02.2004-24.02.2004) (2004)
    27. Daněk Martin, Matoušek Rudolf: Overlay Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2113 (2004)
    28. Daněk Martin, Matoušek Rudolf: Random Access FLASH Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2111 (2004)
    29. Kadlec Jiří, Daněk Martin, Honzík Petr: Reconfigurable Scrolling Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2117 (2004)
    30. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk: Reconfigurable system-on-a-programmable-chip platform , Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, p. 21-28, IEEE Workshop on DDECS 2004 /7./, (Stará Lesná, SK, 18.04.2004-21.04.2004) (2004)
    31. Kadlec Jiří, Daněk Martin, Honzík Petr: Reconfigurable 24-Bit Floating-Point Coprocessor Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2116 (2004)
    32. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří: Dynamic reconfiguration of Atmel FPGAs , UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-4 , Eds: Hettiaratchi S., University of Southampton, (Southampton 2003) , UK ACM SIGDA Workshop on Electronic Design Automation /3./, (Southampton, GB, 11.09.2003-12.09.2003) (2003)
    33. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří: Dynamic reconfiguration of FPGAs , Recent Trends in Multimedia Information Processing. Proceedings, p. 288-291 , Eds: Šimák B., Zahradník P., Czech Technical University, (Prague 2003) , International Workshop on Systems, Signals and Image Processing /10./, (Praha, CZ, 10.09.2003-11.09.2003) (2003)
    34. Matoušek Rudolf, Daněk Martin, Pohl Zdeněk, Kadlec Jiří: Dynamic runtime partial reconfiguration in FPGA , ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, p. 294-298 , Eds: Nouza J., Drábková J., Technical University, (Liberec 2003) , ECMS 2003 /6./, (Liberec, CZ, 02.06.2003-04.06.2003) (2003)
    35. Daněk Martin, Muzikář Z.: Evolutionary techniques in physical design for FPGAs , ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, p. 274-278 , Eds: Drábková J., Nouza J., Technical University, (Liberec 2003) , ECMS 2003 /6./, (Liberec, CZ, 02.06.2003-04.06.2003) (2003)
    36. Daněk Martin: Integrated iterative approach to FPGA placement , Počítačové Architektury & Diagnostika PAD 2003, p. 43-50 , Eds: Kotásek Z., Růžička R., Sekanina L., VUT, (Brno 2003) , PAD 2003 Počítačové Architektury & Diagnostika, (Zvíkovské Podhradí, CZ, 24.09.2003-26.09.2003) (2003)
    Responsible for information: admin
    Last modification: 03.09.2008
    Institute of Information Theory and Automation