Project FP6-IST-027611

Journal articles

1. Pohl Zdeněk, Tichý Milan, Kadlec Jiří: Implementation of the Least-Squares Lattice with Order and Forgetting Factor Estimation for FPGA , EURASIP Journal on Advances in Signal Processing vol.2008, 2008 (2008), p. 1-11 (2008) Download
2. Kadlec Jiří, Chappel S.: Implementing floating-point DSP , Embedded Magazine vol.2, 3 (2006), p. 12-14 (2006) Download

Other publications

1. Kadlec Jiří: Floating Point Accelerator Families bce_fp01_1x1_0_plbw_v1_|10|20|30|_a bce_fp01_1x2_0_plbw_v1_|10|20|30|40|_a for Xilinx Spartan3 DSP 1800 Board and Petalogix Petalinux-v0.40-final, ( 2009) (2009)
2. Kohout Lukáš: Architektury číslicových systémů využívající princip samoadaptace , Počítačové architektury a diagnostika 2008 Sborník příspěvků , Eds: Plíva Zdeněk, Novák Ondřej, Jeníček Jiří, Rozkovec Martin, Počítačové architektury a diagnostika 2008, (Hejnice, CZ, 2008.09.15-2008.09.17) (2008) Download
3. Kohout Lukáš: Floating Point Accelerators for MicroBlaze - Partial Runtime Reconfiguration, ( 2008) (2008)
4. Daněk Martin, Kadlec Jiří, Bartosinski Roman, Kohout Lukáš: Increasing the Level of Abstraction in FPGA-based Designes , International Conference on Field Programmable Logic and Applications , Eds: Kebschull Udo, International Conference on Field Programmable Logic and Applications, (Heidelberg, DE, 08.09.2008-10.09.2008) (2008) Download
5. Kadlec Jiří, Daněk Martin, Kohout Lukáš: Proposed architecture of configurable, adaptable SoC , The IET Irish Signals and Systems Conference ISSC 2008 , Eds: Morgan Fearghal, Glavin Martin, Jones Edward, The Institution of Engineering and Technology Irish Signals and Systems Conference, ISSC 2008, (Galway, IE, 18.06.2008-19.06.2008) (2008)
6. Daněk Martin, Philippe J.-M., Bartosinski Roman, Honzík Petr, Gamrat Ch.: Self-Adaptive Networked Entities for Building Pervasive Computing Aschitectures , International Conference on Evolvable Systems: From Biology to Harware, 8th International Conference, ICES 2008 , Eds: Hornby Gregory S., Sekanina Lukáš, Haddow Pauline C., International Conference on Evolvable Systems: From Biology to Harware, 8th International Conference, ICES 2008, (Praha, CZ, 22.09.2008-24.09.2008) (2008) Download
7. Kadlec Jiří, Bartosinski Roman, Daněk Martin: Accelerating MicroBlaze Floating Point Operations , Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL) , Eds: Bertels Koen, Najjar Walid, Genderen Arjan, Vassiliadis Stamatis, International Conference on Field Programmable Logic and Applications. FPL 2007, (Amsterdam, NL, 27.08.2007-29.08.2007) (2007)
8. Kohout Lukáš: Bluetooth modul WT12, ÚTIA AV ČR, (Praha 2007) (2007)
9. Kohout Lukáš: Částečná dynamická rekonfigurace na FPGA obvodech firmy Xilinx s nástroji ISE a EDK verze 8.2i, ÚTIA AV ČR, (Praha 2007) (2007)
10. Kohout Lukáš: Částečná dynamická rekonfigurace na FPGA obvodech firmy XILINX, ÚTIA AV ČR, (Praha 2007) (2007)
11. Kafka Leoš, Daněk Martin: Development Kit for PicoBlaze Processor in FITkit Board, ÚTIA AV ČR, (Praha 2007) (2007)
12. Kafka Leoš: Development Kit for Xilinx PicoBlaze, ÚTIA AV ČR, (Praha 2007) (2007) Download
13. Pohl Zdeněk: Double Precision System Generator Library, ÚTIA AV ČR, (Praha 2007) (2007)
14. Kadlec Jiří: Embedded Development Environment for a Family of Xilinx FPGA , Regional Conference on Embedded and Ambient Systems Book of Abstracts , Eds: Varga Antila K., Kiss Ákos, Marsiske Stefan, Vásárhelyi József, RCEAS 2007 First Regional Conference on Embedded and Ambient Systems, (Budapešť, HU, 22.11.2007-24.11.2007) (2007)
15. Pohl Zdeněk, Tichý Milan: RLS Lattice Algorithm with Order Probability Evaluation as an Accelerator , Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL) , Eds: Bertels Koen, Najjar Walid, Genderen Arjan, Vassiliadis Stamatis, International Conference on Field Programmable Logic and Applications. FPL 2007, (Amsterdam, NL, 27.08.2007-29.08.2007) (2007)
16. Pohl Zdeněk: Výstup z Celoxica DK jako BlackBox komponenta Systém Generátoru, ÚTIA AV ČR, (Praha 2007) (2007)
17. Kadlec Jiří, Daněk Martin: Design and verification methodology for reconfigurable designs in Atmel FPSLIC , Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 79-80 , Eds: Reorda M. S., Novák O., Straube B., DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems, (Prague, CZ, 18.04.2006-21.04.2006) (2006)