Profile of the Signal Processing Group
Our group focuses on research, development and implementation of advanced digital signal processing algorithms, mainly in the fields of adaptive control and audio processing. We build on our experience with statistics, namely with the Bayesian approach to system identification and modeling, as well as the relevant fields of linear algebra.
Our target platforms are Field Programmable Gate Arrays (FPGAs) and Digital Signal Processors (DSPs). We use Matlab/Simulink to specify, model and verify algorithms that we later convert and synthesize to HW. As such specialized solutions are likely to be used in embedded systems, we also research features that result in extremely fast execution, use small amount of memory, small chip area or low power consumption. We achieve this both through designing new or modifying existing DSP algorithms, and using architectural properties such as dynamic reconfiguration of FPGAs...
Our aim is not only to cope with the theoretical design of the algorithms, but also to help industrial partners to solve implementation issues in all their complexity. The state-of-the-art DSP applications, such as wireless networking, mobile communications, or audio enhancement systems, are very often used as components in embedded systems. Roughly speaking, this means that such applications are implemented using rather limited hardware resources on a dedicated chip. Naturally the implementation has to respect specifics of the target environment, e.g. limited memory, chip area, low power consumption.
The above mentioned issues definitely call for a multidisciplinary approach. Typical embedded systems that we deal with are Field Programmable Gate Arrays (FPGAs) or Digital Signal Processors (DSPs). We are currently developing advanced design tools linking the high-level design environments of Matlab/Simulink, Xilinx System Generator and VHDL with the tools for optimized physical design and for the modular designs.
We have been the project partner in the ESPRIT project No. 33544 "High Speed Logarithmic Arithmetic Unit" and the IST project No. IST-2001-34016 "Design methodology and environment for the dynamic RECONFigurable FPGA". The first one was aimed at implementation of the logarithmic arithmetic as an efficient solution for the floating-point computations in the embedded devices, the latter in development of design methodology for dynamic reconfiguration of Xilinx and Atmel devices as means for rapid implementation of complex algorithms in small and low-cost devices.
Besides several projects with national funding we are currently involved in the EU-funded IST project No. FP6-2004-IST-4-027611 "self-Adaptive Embedded Technologies for Pervasive Computing Architectures" that researches possible uses of self-adaptation for more efficient design of complex embedded systems.
The scientific profile of our department is complemented with activities that promote cooperation between the Academia and industry. We are engaged in several national and European projects (Idealist FP7, IST World, COSINE) that help local IT organizations prepare or join large-scale projects within the 7th EU Framework Programme. As part of these activities we have organized several workshops and seminars for the potential proposers.
The department has a staff of 14 researchers. Six of us work towards their PhD degree.
